[PATCH] D104427: [amdgpu] Improve the from f32 to i64.
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 17 01:25:49 PDT 2021
foad added a reviewer: foad.
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2594
-SDValue AMDGPUTargetLowering::LowerFP64_TO_INT(SDValue Op, SelectionDAG &DAG,
- bool Signed) const {
+SDValue AMDGPUTargetLowering::LowerFP3264_TO_INT(SDValue Op, SelectionDAG &DAG,
+ bool Signed) const {
----------------
`LowerFP_TO_INT64` might be a better name?
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2614
+ SDValue Sign;
+ if (SrcVT == MVT::f32) {
+ // However, a 32-bit floating point number has only 23 bits mantissa and
----------------
Only do this if `Signed`?
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp:2653
+
+ if (SrcVT == MVT::f32) {
+ assert(Sign);
----------------
Only do this if `Signed`?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D104427/new/
https://reviews.llvm.org/D104427
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