[PATCH] D104433: [MCA] Skipping Defs with RegID of 0 rather than asserting.

[Patrick Holland via Phabricator via llvm-commits]

holland11 created this revision.
holland11 added reviewers: qcolombet, andreadb.
Herald added a subscriber: hiraditya.
holland11 requested review of this revision.
Herald added a project: LLVM.

This patch will allow developers to remove unwanted instruction Defs (most likely from within a target specific InstrPostProcess) by setting that Def's RegisterID to 0.

I tested it on a few examples and it worked as expected and had no errors.

I have commit access now, so if you (Andrea) want to hold off on committing this, I'll ask Quentin to show me how to commit it myself tomorrow (assuming you don't have any objections).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104433

Files:
  llvm/lib/MCA/HardwareUnits/RegisterFile.cpp


Index: llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
===================================================================
--- llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
+++ llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
@@ -109,7 +109,12 @@
       return;
 
     MCPhysReg RegID = WS.getRegisterID();
-    assert(RegID != 0 && "A write of an invalid register?");
+
+    // This allows InstrPostProcess to remove register Defs
+    // by setting their RegisterID to 0.
+    if (!RegID)
+      continue;
+
     assert(WS.getCyclesLeft() != UNKNOWN_CYCLES &&
            "The number of cycles should be known at this point!");
     assert(WS.getCyclesLeft() <= 0 && "Invalid cycles left for this write!");
@@ -224,7 +229,11 @@
                                     MutableArrayRef<unsigned> UsedPhysRegs) {
   WriteState &WS = *Write.getWriteState();
   MCPhysReg RegID = WS.getRegisterID();
-  assert(RegID && "Adding an invalid register definition?");
+
+  // This allows InstrPostProcess to remove register Defs
+  // by setting their RegisterID to 0.
+  if (!RegID)
+    return;
 
   LLVM_DEBUG({
     dbgs() << "[PRF] addRegisterWrite [ " << Write.getSourceIndex() << ", "
@@ -316,7 +325,11 @@
 
   MCPhysReg RegID = WS.getRegisterID();
 
-  assert(RegID != 0 && "Invalidating an already invalid register?");
+  // This allows InstrPostProcess to remove register Defs
+  // by setting their RegisterID to 0.
+  if (!RegID)
+    return;
+
   assert(WS.getCyclesLeft() != UNKNOWN_CYCLES &&
          "Invalidating a write of unknown cycles!");
   assert(WS.getCyclesLeft() <= 0 && "Invalid cycles left for this write!");


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