[PATCH] D104060: Machine IR Profile

[Ellis Hoag via Phabricator via llvm-commits]

ellis added a comment.

In D104060#2823466 <https://reviews.llvm.org/D104060#2823466>, @MaskRay wrote:

> For the profile format, there is indeed a bit redundancy in -fprofile-generate/-fprofile-instr-generate.
> Some fields are reserved even if value profiling is not used. I do not have a good idea how we can save the space for coverage usage.
> Some fields are 64-bit for generality. As I mentioned, a 32-bit CFG signature makes it less robust when the number of functions exceed roughly 2**16.

Actually, the 32-bit CFG signature we use in MIP is not unique to functions. If two functions have the same basic block layout, they will have the same CFG signature and that is not a problem. The field is used to determine if a function has changed from when it was profiled. I'm not sure if this is different from the other profile formats.

> The 32-bit Function PC Offset is probably sufficient for most usage but will not work with medium/large code model programs.

That is true, but we wanted to use 32 bit values to maintain consistency with armv7 targets. We could probably add a flag to support 64 bit values if we need to.


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