[llvm] 308f6a5 - [NFC][X86] lowerVECTOR_SHUFFLE(): drop FIXME about widening to i128 (YMM half) element type

Roman Lebedev via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 16 00:25:11 PDT 2021


Author: Roman Lebedev
Date: 2021-06-16T10:24:33+03:00
New Revision: 308f6a5245a249e08efbdaa73b6cc6e693e0185f

URL: https://github.com/llvm/llvm-project/commit/308f6a5245a249e08efbdaa73b6cc6e693e0185f
DIFF: https://github.com/llvm/llvm-project/commit/308f6a5245a249e08efbdaa73b6cc6e693e0185f.diff

LOG: [NFC][X86] lowerVECTOR_SHUFFLE(): drop FIXME about widening to i128 (YMM half) element type

As per the discussion in D103818, so far, this does not appear to be worthwhile.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D103818

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 2148edd16d62..66c91f86f92c 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -18435,7 +18435,7 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, const X86Subtarget &Subtarget,
 
   // Try to collapse shuffles into using a vector type with fewer elements but
   // wider element types. We cap this to not form integers or floating point
-  // elements wider than 64 bits, but it might be interesting to form i128
+  // elements wider than 64 bits. It does not seem beneficial to form i128
   // integers to handle flipping the low and high halves of AVX 256-bit vectors.
   SmallVector<int, 16> WidenedMask;
   if (VT.getScalarSizeInBits() < 64 && !Is1BitVector &&


        


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