[PATCH] D104264: Fix atomic loads and stores of 64-bit integers in non-default address spaces on ARM.Performing an atomic load or store of a 64-bit value, using an address outside the default address space, triggers an assertion failure on ARM.The ARM back-end...

[Koutheir Attouchi via Phabricator via llvm-commits]

koutheir created this revision.
koutheir added reviewers: rengolin, asl, t.p.northover, arsenm.
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...is missing an address space cast that is required in this situation.

This patch assumes that ARM synchronization semantics are the same irrespective of the address space.

Fix atomic loads and stores of 64-bit integers in non-default address spaces on ARM.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104264

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/ARM/atomic-i64-other-address-space.ll

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