[PATCH] D104247: [DAGCombine] reassoc flag shouldn't enable contract

[Jinsong Ji via Phabricator via llvm-commits]

jsji created this revision.
jsji added reviewers: spatel, RKSimon, mcberg2017, qiucf, greened, dfukalov, arsenm, steven.zhang.
Herald added subscribers: kerbowa, pengfei, dmgreen, hiraditya, nhaehnle, jvesely, nemanjai.
jsji requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

According to IR LangRef, the FMF flag:

contract
Allow floating-point contraction (e.g. fusing a multiply followed by an
addition into a fused multiply-and-add).

reassoc
Allow reassociation transformations for floating-point instructions.
This may dramatically change results in floating-point.

My understanding is that these two flags shouldn't imply each other,
as we might have a SDNode that can be reassociated with others, but
not contractble.

eg: We may want following fmul/fad/fsub to freely reassoc, but don't
want fma being generated here.

  %F = fmul reassoc double %A, %B         ; <double> [#uses=1]
  %G = fmul reassoc double %C, %D         ; <double> [#uses=1]
  %H = fadd reassoc double %F, %G         ; <double> [#uses=1]
  %I = fsub reassoc double %H, %E         ; <double> [#uses=1]

Before https://reviews.llvm.org/D45710, hasAllowReassociation actually
did not imply isContratable either.

static bool isContractable(SDNode *N) {

  SDNodeFlags F = N->getFlags();
  return F.hasAllowContract() || F.hasUnsafeAlgebra();

}

The current implementation also only check the flag in fadd node,
ignoring fmul node, this patch update that as well.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104247

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/fadd-combines.ll
  llvm/test/CodeGen/AArch64/vldn_shuffle.ll
  llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
  llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
  llvm/test/CodeGen/AMDGPU/fmuladd.f64.ll
  llvm/test/CodeGen/AMDGPU/fmuladd.v2f16.ll
  llvm/test/CodeGen/PowerPC/combine-fneg.ll
  llvm/test/CodeGen/PowerPC/fdiv.ll
  llvm/test/CodeGen/PowerPC/fma-aggr-FMF.ll
  llvm/test/CodeGen/PowerPC/fma-assoc.ll
  llvm/test/CodeGen/PowerPC/fma-combine.ll
  llvm/test/CodeGen/PowerPC/fma-mutate.ll
  llvm/test/CodeGen/PowerPC/fma-negate.ll
  llvm/test/CodeGen/PowerPC/fma-precision.ll
  llvm/test/CodeGen/PowerPC/fmf-propagation.ll
  llvm/test/CodeGen/PowerPC/machine-combiner.ll
  llvm/test/CodeGen/PowerPC/recipest.ll
  llvm/test/CodeGen/PowerPC/register-pressure-reduction.ll
  llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll
  llvm/test/CodeGen/Thumb2/mve-vldshuffle.ll
  llvm/test/CodeGen/X86/machine-combiner.ll
  llvm/test/CodeGen/X86/sqrt-fastmath.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D104247.351939.patch
Type: text/x-patch
Size: 34335 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210614/0ed83b9a/attachment.bin>