[PATCH] D104032: [RISCV] Transform unaligned RVV vector loads/stores to aligned ones

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck marked 2 inline comments as done.
frasercrmck added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1906
+                                                    SelectionDAG &DAG) const {
+  auto *Load = dyn_cast<LoadSDNode>(Op);
+  assert(Load && Load->getMemoryVT().isVector() && "Expected vector load");
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craig.topper wrote:
> cast instead of dyn_cast?
Good catch, thanks.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D104032/new/

https://reviews.llvm.org/D104032