[PATCH] D104042: [AArch64] Improve SAD pattern

JinGu Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 14 07:46:54 PDT 2021


jaykang10 added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:12073-12074
+  // Third, create the node of UADDLP.
+  SDValue UADDLPOp0 = UABAL;
+  SDValue UADDLP = DAG.getNode(AArch64ISD::UADDLP, DL, MVT::v4i32, UADDLPOp0);
+
----------------
dmgreen wrote:
> Just use UABAL directly? It would seem simpler that way. Same for the other SDValues in this function, which seem to be copied more than they need to be.
Yep, let me update it.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104042/new/

https://reviews.llvm.org/D104042



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