[PATCH] D92842: [RFC][SelectionDAG] Add Target-Independent Compiler Barrier

[Sam Elliott via Phabricator via llvm-commits]

lenary updated this revision to Diff 351798.
lenary added a comment.

Updated based on review feedback:

- Migrated more targets to COMPILER_BARRIER
- Added syncscope argument to COMPILER_BARRIER


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D92842/new/

https://reviews.llvm.org/D92842

Files:
  llvm/include/llvm/CodeGen/MachineInstr.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/Support/TargetOpcodes.def
  llvm/include/llvm/Target/Target.td
  llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/Target/AArch64/AArch64InstrAtomics.td
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
  llvm/lib/Target/ARM/ARMInstrInfo.td
  llvm/lib/Target/ARM/ARMScheduleA57.td
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
  llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
  llvm/lib/Target/SystemZ/SystemZISelLowering.h
  llvm/lib/Target/SystemZ/SystemZInstrInfo.td
  llvm/lib/Target/SystemZ/SystemZOperators.td
  llvm/lib/Target/VE/VEISelLowering.cpp
  llvm/lib/Target/VE/VEISelLowering.h
  llvm/lib/Target/VE/VEInstrInfo.td
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86InstrCompiler.td
  llvm/lib/Target/X86/X86InstrInfo.cpp
  llvm/lib/Target/X86/X86InstrInfo.td
  llvm/lib/Target/X86/X86MCInstLower.cpp
  llvm/lib/Target/XCore/XCoreISelLowering.cpp
  llvm/lib/Target/XCore/XCoreISelLowering.h
  llvm/lib/Target/XCore/XCoreInstrInfo.td
  llvm/test/CodeGen/AArch64/fence-singlethread.ll
  llvm/test/CodeGen/ARM/fence-singlethread.ll
  llvm/test/CodeGen/RISCV/atomic-fence.ll
  llvm/test/CodeGen/SystemZ/atomic-fence-02.ll
  llvm/test/CodeGen/X86/atomic-idempotent.ll
  llvm/test/CodeGen/X86/atomic-unordered.ll
  llvm/test/CodeGen/X86/barrier-sse.ll
  llvm/test/CodeGen/X86/implicit-null-check.ll
  llvm/test/CodeGen/XCore/atomic.ll

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