[PATCH] D104205: [X86] Schedule-model second (mask) output of GATHER instruction

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: craig.topper, RKSimon, spatel.
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Much like `mulx`'s `WriteIMulH`, there are two outputs of AVX2 GATHER instructions.
This was changed back in rL160110 <https://reviews.llvm.org/rL160110>, but the sched model change wasn't present.
So right now, for sched models that are marked as complete (`znver3` only now),
codegen'ning `GATHER` results in a crash:

  DefIdx 1 exceeds machine model writes for early-clobber renamable $ymm3, dead early-clobber renamable $ymm2 = VPGATHERDDYrm killed renamable $ymm3(tied-def 0), undef renamable $rax, 4, renamable $ymm0, 0, $noreg, killed renamable $ymm2(tied-def 1) :: (load 32, align 1)

https://godbolt.org/z/Ks7zW7WGh

I'm guessing we need to deal with this like we deal with `WriteIMulH`?


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104205

Files:
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/lib/Target/X86/X86SchedBroadwell.td
  llvm/lib/Target/X86/X86SchedHaswell.td
  llvm/lib/Target/X86/X86SchedSandyBridge.td
  llvm/lib/Target/X86/X86SchedSkylakeClient.td
  llvm/lib/Target/X86/X86SchedSkylakeServer.td
  llvm/lib/Target/X86/X86Schedule.td
  llvm/lib/Target/X86/X86ScheduleAtom.td
  llvm/lib/Target/X86/X86ScheduleBdVer2.td
  llvm/lib/Target/X86/X86ScheduleBtVer2.td
  llvm/lib/Target/X86/X86ScheduleSLM.td
  llvm/lib/Target/X86/X86ScheduleZnver1.td
  llvm/lib/Target/X86/X86ScheduleZnver2.td
  llvm/lib/Target/X86/X86ScheduleZnver3.td

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