[PATCH] D104187: [DAGCombine] reduceBuildVecToShuffle(): sort input vectors by decreasing size
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 13 01:46:36 PDT 2021
RKSimon added a comment.
A few nits but the premise seems sound - did you encounter real world cases that led you to this?
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:19121
+ } else {
+ assert(InVT2Size <= InVT1Size);
// VecIn1 is wider than the output, and we have another, possibly
----------------
assert message
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:19270
+ return std::distance(Range.begin(), I);
+}
+
----------------
Move this inside reduceBuildVecToShuffle?
================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:19416
+ unsigned Idx = getFirstIndexOf(SortedVecIn, VecIn[SourceVectorIndex]);
+ assert(Idx > 0 && Idx < SortedVecIn.size());
+ assert(VecIn[SourceVectorIndex] == SortedVecIn[Idx] && "Remapping failure");
----------------
assert message (or merge asserts)
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D104187/new/
https://reviews.llvm.org/D104187
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