[PATCH] D101970: [X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB

[Florian Hahn via Phabricator via llvm-commits]

fhahn added a comment.

In D101970#2813643 <https://reviews.llvm.org/D101970#2813643>, @Carrot wrote:

> The fix has been committed as f35bcea1d4748889b8240defdf00cb7a71cbe070 <https://reviews.llvm.org/rGf35bcea1d4748889b8240defdf00cb7a71cbe070>.

Unfortunately this still creates invalid Machine IR for the llvm-test-suite on X86, as I mentioned above. E.g. see http://green.lab.llvm.org/green/job/test-suite-verify-machineinstrs-x86_64-O3/9585/

I reverted the fix and the patch in 5cd66420ccb1 <https://reviews.llvm.org/rG5cd66420ccb196d2af2abfb8e27c74b0e5721718>, 1b748faf2bae <https://reviews.llvm.org/rG1b748faf2bae246e2fc77d88420df13c2e60f4df> to get the public bots back to green.

To reproduce, `llc -verify-machineinstrs` on the IR below on X86:

  target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
  
  %struct.widget = type { i32, i32, i32, i32, i32*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [16 x [16 x i16]], [6 x [32 x i32]], [16 x [16 x i32]], [4 x [12 x [4 x [4 x i32]]]], [16 x i32], i8**, i32*, i32***, i32**, i32, i32, i32, i32, %struct.baz*, %struct.wobble.1*, i32, i32, i32, i32, i32, i32, %struct.quux.2*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32***, i32***, i32****, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [3 x [2 x i32]], [3 x [2 x i32]], i32, i32, i64, i64, %struct.zot.3, %struct.zot.3, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
  %struct.baz = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, %struct.snork*, %struct.wombat.0*, %struct.wobble*, i32, i32*, i32*, i32*, i32, i32*, i32*, i32*, i32 (%struct.widget*, %struct.eggs*)*, i32, i32, i32, i32 }
  %struct.snork = type { %struct.spam*, %struct.zot, i32 (%struct.wombat*, %struct.widget*, %struct.snork*)* }
  %struct.spam = type { i32, i32, i32, i32, i8*, i32 }
  %struct.zot = type { i32, i32, i32, i32, i32, i8*, i32* }
  %struct.wombat = type { i32, i32, i32, i32, i32, i32, i32, i32, void (i32, i32, i32*, i32*)*, void (%struct.wombat*, %struct.widget*, %struct.zot*)* }
  %struct.wombat.0 = type { [4 x [11 x %struct.quux]], [2 x [9 x %struct.quux]], [2 x [10 x %struct.quux]], [2 x [6 x %struct.quux]], [4 x %struct.quux], [4 x %struct.quux], [3 x %struct.quux] }
  %struct.quux = type { i16, i8 }
  %struct.wobble = type { [2 x %struct.quux], [4 x %struct.quux], [3 x [4 x %struct.quux]], [10 x [4 x %struct.quux]], [10 x [15 x %struct.quux]], [10 x [15 x %struct.quux]], [10 x [5 x %struct.quux]], [10 x [5 x %struct.quux]], [10 x [15 x %struct.quux]], [10 x [15 x %struct.quux]] }
  %struct.eggs = type { [1000 x i8], [1000 x i8], [1000 x i8], i32, i32, i32, i32, i32, i32, i32, i32 }
  %struct.wobble.1 = type { i32, [2 x i32], i32, i32, %struct.wobble.1*, %struct.wobble.1*, i32, [2 x [4 x [4 x [2 x i32]]]], i32, i64, i64, i32, i32, [4 x i8], [4 x i8], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
  %struct.quux.2 = type { i32, i32, i32, i32, i32, %struct.quux.2* }
  %struct.zot.3 = type { i64, i16, i16, i16 }
  
  define void @blam(%struct.widget* %arg, i32 %arg1) local_unnamed_addr {
  bb:
    %tmp = load i32, i32* undef, align 4
    %tmp2 = sdiv i32 %tmp, 6
    %tmp3 = sdiv i32 undef, 6
    %tmp4 = load i32, i32* undef, align 4
    %tmp5 = icmp eq i32 %tmp4, 4
    %tmp6 = select i1 %tmp5, i32 %tmp3, i32 %tmp2
    %tmp7 = getelementptr inbounds [4 x [4 x i32]], [4 x [4 x i32]]* undef, i64 0, i64 0, i64 0
    %tmp8 = zext i16 undef to i32
    %tmp9 = zext i16 undef to i32
    %tmp10 = load i16, i16* undef, align 2
    %tmp11 = zext i16 %tmp10 to i32
    %tmp12 = zext i16 undef to i32
    %tmp13 = zext i16 undef to i32
    %tmp14 = zext i16 undef to i32
    %tmp15 = load i16, i16* undef, align 2
    %tmp16 = zext i16 %tmp15 to i32
    %tmp17 = zext i16 undef to i32
    %tmp18 = sub nsw i32 %tmp8, %tmp9
    %tmp19 = shl nsw i32 undef, 1
    %tmp20 = add nsw i32 %tmp19, %tmp18
    %tmp21 = sub nsw i32 %tmp11, %tmp12
    %tmp22 = shl nsw i32 undef, 1
    %tmp23 = add nsw i32 %tmp22, %tmp21
    %tmp24 = sub nsw i32 %tmp13, %tmp14
    %tmp25 = shl nsw i32 undef, 1
    %tmp26 = add nsw i32 %tmp25, %tmp24
    %tmp27 = sub nsw i32 %tmp16, %tmp17
    %tmp28 = shl nsw i32 undef, 1
    %tmp29 = add nsw i32 %tmp28, %tmp27
    %tmp30 = sub nsw i32 %tmp20, %tmp29
    %tmp31 = sub nsw i32 %tmp23, %tmp26
    %tmp32 = shl nsw i32 %tmp30, 1
    %tmp33 = add nsw i32 %tmp32, %tmp31
    store i32 %tmp33, i32* undef, align 4
    %tmp34 = mul nsw i32 %tmp31, -2
    %tmp35 = add nsw i32 %tmp34, %tmp30
    store i32 %tmp35, i32* undef, align 4
    %tmp36 = select i1 %tmp5, i32 undef, i32 undef
    br label %bb37
  
  bb37:                                             ; preds = %bb
    %tmp38 = load i32, i32* undef, align 4
    %tmp39 = ashr i32 %tmp38, %tmp6
    %tmp40 = load i32, i32* undef, align 4
    %tmp41 = sdiv i32 %tmp39, %tmp40
    store i32 %tmp41, i32* undef, align 4
    ret void
  }


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D101970/new/

https://reviews.llvm.org/D101970