[PATCH] D64836: [Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions.

[Andrei Safronov via Phabricator via llvm-commits]

andreisfr marked an inline comment as done.
andreisfr added a comment.

@jrtc27 ,thank you very much for comments.



================
Comment at: llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp:495
 }
- 
 bool XtensaAsmParser::ParseInstructionWithSR(ParseInstructionInfo &Info,
----------------
jrtc27 wrote:
> Whatever patch includes this whitespace should be fixed.
Whitespace is removed


================
Comment at: llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp:96
+    unsigned Hi2 = (Value >> 4) & 0x3;
+    unsigned Lo4 = (Value)&0xf;
+    return (Hi2 << 4) | (Lo4 << 12);
----------------
jrtc27 wrote:
> Whitespace, and unnecessary parens.
Whitespace and parentheses are removed


================
Comment at: llvm/test/MC/Xtensa/relocations.s:14
+
+ ball a1, a3, func
+# RELOC: R_XTENSA_SLOT0_OP
----------------
jrtc27 wrote:
> Some assembly files have 1 leading space, some have 0, some have multiple. Please be consistent.
I removed leading spaces from tests.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64836/new/

https://reviews.llvm.org/D64836