[PATCH] D103498: [AArch64][GlobalISel] Use PackedVectorAllTypeList for G_SHUFFLE_VECTOR
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 11 16:00:38 PDT 2021
aemerson added inline comments.
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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir:45
- ; CHECK: value: '<8 x i8> <i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3>'
- ; CHECK: alignment: 8
; CHECK: liveins: $d0, $d1
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These lines need to stay because the test needs to check the tbl values.
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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir:150
+---
+name: shuffle_v4i16
+alignment: 4
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And likewise, new tests need the constant pool values.
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Comment at: llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir:242
+ %3:gpr(s64) = G_CONSTANT i64 0
+ %2:fpr(<2 x s32>) = G_DUPLANE32 %5, %3(s64)
+ $d0 = COPY %2(<2 x s32>)
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This isn't using a shuffle vector.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103498/new/
https://reviews.llvm.org/D103498
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