[PATCH] D104069: [RISCV] Teach vsetvli insertion to remember when predecessors have same AVL and SEW/LMUL ratio if their VTYPEs otherwise mismatch.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 351528.
craig.topper added a comment.

Fixed typo in comment


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D104069/new/

https://reviews.llvm.org/D104069

Files:
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
  llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D104069.351528.patch
Type: text/x-patch
Size: 9906 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210611/17ca6847/attachment.bin>