[PATCH] D104107: [NFCI][X86] Drop "atom"/"slm" target tuning "features", derive them from CPU string

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: craig.topper, RKSimon, spatel.
lebedev.ri added a project: LLVM.
Herald added subscribers: pengfei, hiraditya.
lebedev.ri requested review of this revision.

It isn't obvious to me why these have to be features?
We know the cpu name, and as the not-failing tests show,
that is enough for `X86Subtarget::isSLM()`/`X86Subtarget::isAtom()`.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D104107

Files:
  llvm/lib/Target/X86/X86.td
  llvm/lib/Target/X86/X86Subtarget.h
  llvm/lib/Target/X86/X86TargetTransformInfo.h


Index: llvm/lib/Target/X86/X86TargetTransformInfo.h
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.h
+++ llvm/lib/Target/X86/X86TargetTransformInfo.h
@@ -87,10 +87,6 @@
       // Based on whether user set the -mprefer-vector-width command line.
       X86::FeaturePrefer128Bit,
       X86::FeaturePrefer256Bit,
-
-      // CPU name enums. These just follow CPU string.
-      X86::ProcIntelAtom,
-      X86::ProcIntelSLM,
   };
 
 public:
Index: llvm/lib/Target/X86/X86Subtarget.h
===================================================================
--- llvm/lib/Target/X86/X86Subtarget.h
+++ llvm/lib/Target/X86/X86Subtarget.h
@@ -50,14 +50,6 @@
 } // end namespace PICStyles
 
 class X86Subtarget final : public X86GenSubtargetInfo {
-  // NOTE: Do not add anything new to this list. Coarse, CPU name based flags
-  // are not a good idea. We should be migrating away from these.
-  enum X86ProcFamilyEnum {
-    Others,
-    IntelAtom,
-    IntelSLM
-  };
-
   enum X86SSEEnum {
     NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F
   };
@@ -66,9 +58,6 @@
     NoThreeDNow, MMX, ThreeDNow, ThreeDNowA
   };
 
-  /// X86 processor family: Intel Atom, and others
-  X86ProcFamilyEnum X86ProcFamily = Others;
-
   /// Which PIC style to use
   PICStyles::Style PICStyle;
 
@@ -818,8 +807,8 @@
   bool isXRaySupported() const override { return is64Bit(); }
 
   /// TODO: to be removed later and replaced with suitable properties
-  bool isAtom() const { return X86ProcFamily == IntelAtom; }
-  bool isSLM() const { return X86ProcFamily == IntelSLM; }
+  bool isAtom() const { return getTuneCPU() == "atom"; }
+  bool isSLM() const { return getTuneCPU() == "slm"; }
   bool useSoftFloat() const { return UseSoftFloat; }
   bool useAA() const override { return UseAA; }
 
Index: llvm/lib/Target/X86/X86.td
===================================================================
--- llvm/lib/Target/X86/X86.td
+++ llvm/lib/Target/X86/X86.td
@@ -531,11 +531,6 @@
 def FeatureUseAA : SubtargetFeature<"use-aa", "UseAA", "true",
                                     "Use alias analysis during codegen">;
 
-// Bonnell
-def ProcIntelAtom : SubtargetFeature<"", "X86ProcFamily", "IntelAtom", "">;
-// Silvermont
-def ProcIntelSLM  : SubtargetFeature<"", "X86ProcFamily", "IntelSLM", "">;
-
 //===----------------------------------------------------------------------===//
 // Register File Description
 //===----------------------------------------------------------------------===//
@@ -810,8 +805,7 @@
                                          FeatureCMPXCHG16B,
                                          FeatureMOVBE,
                                          FeatureLAHFSAHF];
-  list<SubtargetFeature> AtomTuning = [ProcIntelAtom,
-                                       FeatureSlowUAMem16,
+  list<SubtargetFeature> AtomTuning = [FeatureSlowUAMem16,
                                        FeatureLEAForSP,
                                        FeatureSlowDivide32,
                                        FeatureSlowDivide64,
@@ -826,8 +820,7 @@
                                                   FeaturePCLMUL,
                                                   FeaturePRFCHW,
                                                   FeatureRDRAND];
-  list<SubtargetFeature> SLMTuning = [ProcIntelSLM,
-                                      FeatureSlowTwoMemOps,
+  list<SubtargetFeature> SLMTuning = [FeatureSlowTwoMemOps,
                                       FeatureSlowLEA,
                                       FeatureSlowIncDec,
                                       FeatureSlowDivide64,


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