[PATCH] D79509: [RISCV] Support CLIC interruption mode named operands for CSR instructions

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jun 10 17:24:04 PDT 2021


jrtc27 added a comment.

I don't see adding experimental CSRs as hugely necessary. With CodeGen, intrinsics and instructions there's no nice way to do it without toolchain support, but for CSRs you can just `#define` the name.


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  https://reviews.llvm.org/D79509/new/

https://reviews.llvm.org/D79509



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