[PATCH] D103010: [PowerPC] Export 16 byte load-store instructions
Jinsong Ji via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 9 19:10:27 PDT 2021
jsji added inline comments.
================
Comment at: llvm/test/CodeGen/PowerPC/ldst-16-byte.mir:2
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -simplify-mir -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
+# RUN: -stop-after=postrapseudos %s -o - | FileCheck %s
----------------
lkail wrote:
> jsji wrote:
> > How about powerpc32?
> I guess it's not supported in powerpc32 mode, though I can't find where it is documented(It's documented in AIX assembly manual that `ldarx` and `stdcx` are not supported in powerpc32 mode). I've tried following on AIX-7.2
> ```
> main:
> lq 2,128(4)
> stq 2,128(4)
> lqarx 2,3,4
> lqarx 2,3,4,1
> stqcx. 2,3,4
>
> # as above code
> as -a64 -mpwr8 enc.s
> objdump -D a.out
> ```
> It gives correct dump result.
> ```
> 0000000000000000 <.text>:
> 0: e0 44 00 80 lq r2,128(r4)
> 4: f8 44 00 82 stq r2,128(r4)
> 8: 7c 43 22 28 lqarx r2,r3,r4
> c: 7c 43 22 29 lqarx r2,r3,r4,1
> 10: 7c 43 21 6d stqcx. r2,r3,r4
> ```
> But for `as -a32 -mpwr8 enc.s`, the result is not correct.
> ```
> 00000000 <.text>:
> 0: e0 44 00 80 lfq f2,128(r4)
> 4: f8 44 00 82 .long 0xf8440082
> 8: 7c 43 22 28 .long 0x7c432228
> c: 7c 43 22 29 .long 0x7c432229
> 10: 7c 43 21 6d .long 0x7c43216d
> ```
>
Thanks. If so, there opcode should be guarded with isPPC64 pred.
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https://reviews.llvm.org/D103010/new/
https://reviews.llvm.org/D103010
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