[PATCH] D104000: GlobalISel: Use LLT in memory legality queries

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: aemerson, paquette, dsanders, bogner.
Herald added subscribers: foad, kerbowa, jfb, atanasyan, jrtc27, hiraditya, rovka, nhaehnle, jvesely, sdardis.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

This enables proper lowering of non-byte sized loads. We still aren't
faithfully preserving memory types everywhere, so the legality checks
still only consider the size.


https://reviews.llvm.org/D104000

Files:
  llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
  llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp
  llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  llvm/lib/Target/ARM/ARMInstructionSelector.cpp
  llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
  llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-trunc.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
  llvm/test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
  llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-consts.mir
  llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-exts.mir
  llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir
  llvm/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
  llvm/test/CodeGen/ARM/GlobalISel/thumb-select-load-store.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/mul.mir
  llvm/test/CodeGen/Mips/GlobalISel/legalizer/truncStore_and_aExtLoad.mir
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll
  llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/truncStore_and_aExtLoad.ll
  llvm/unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp
  llvm/unittests/CodeGen/GlobalISel/LegalizerTest.cpp

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