[PATCH] D103597: [AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier

Meera Nakrani via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 9 04:33:10 PDT 2021


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGd96ea4662980: [AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier (authored by MeeraN).

Changed prior to commit:
  https://reviews.llvm.org/D103597?vs=350581&id=350850#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103597/new/

https://reviews.llvm.org/D103597

Files:
  llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/byval-call.ll
  llvm/test/CodeGen/AArch64/consthoist-gep.ll
  llvm/test/CodeGen/AArch64/ldst-opt.ll
  llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D103597.350850.patch
Type: text/x-patch
Size: 15368 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210609/8904e2ae/attachment.bin>


More information about the llvm-commits mailing list