[llvm] 205cde6 - Revert "[SROA] Avoid splitting loads/stores with irregular type"

Nico Weber via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 9 03:33:26 PDT 2021


Author: Nico Weber
Date: 2021-06-09T06:32:58-04:00
New Revision: 205cde63c70e017a71d1ec06377421f7733f2ad5

URL: https://github.com/llvm/llvm-project/commit/205cde63c70e017a71d1ec06377421f7733f2ad5
DIFF: https://github.com/llvm/llvm-project/commit/205cde63c70e017a71d1ec06377421f7733f2ad5.diff

LOG: Revert "[SROA] Avoid splitting loads/stores with irregular type"

This reverts commit 905f4eb537c118783969fded19e96fe6504c2956.
Breaks check-llvm on most (all?) bots, see https://reviews.llvm.org/D99435

Added: 
    

Modified: 
    llvm/lib/Transforms/Scalar/SROA.cpp

Removed: 
    llvm/test/Transforms/SROA/irregular-type.ll


################################################################################
diff  --git a/llvm/lib/Transforms/Scalar/SROA.cpp b/llvm/lib/Transforms/Scalar/SROA.cpp
index d9be9b6c39cd8..b76f2288c6462 100644
--- a/llvm/lib/Transforms/Scalar/SROA.cpp
+++ b/llvm/lib/Transforms/Scalar/SROA.cpp
@@ -768,8 +768,7 @@ class AllocaSlices::SliceBuilder : public PtrUseVisitor<SliceBuilder> {
     // We allow splitting of non-volatile loads and stores where the type is an
     // integer type. These may be used to implement 'memcpy' or other "transfer
     // of bits" patterns.
-    bool IsSplittable =
-        Ty->isIntegerTy() && !IsVolatile && DL.typeSizeEqualsStoreSize(Ty);
+    bool IsSplittable = Ty->isIntegerTy() && !IsVolatile;
 
     insertUse(I, Offset, Size, IsSplittable);
   }
@@ -3990,7 +3989,6 @@ bool SROA::presplitLoadsAndStores(AllocaInst &AI, AllocaSlices &AS) {
     SplitLoads.clear();
 
     IntegerType *Ty = cast<IntegerType>(LI->getType());
-    assert(Ty->getBitWidth() % 8 == 0);
     uint64_t LoadSize = Ty->getBitWidth() / 8;
     assert(LoadSize > 0 && "Cannot have a zero-sized integer load!");
 
@@ -4115,7 +4113,6 @@ bool SROA::presplitLoadsAndStores(AllocaInst &AI, AllocaSlices &AS) {
   for (StoreInst *SI : Stores) {
     auto *LI = cast<LoadInst>(SI->getValueOperand());
     IntegerType *Ty = cast<IntegerType>(LI->getType());
-    assert(Ty->getBitWidth() % 8 == 0);
     uint64_t StoreSize = Ty->getBitWidth() / 8;
     assert(StoreSize > 0 && "Cannot have a zero-sized integer store!");
 

diff  --git a/llvm/test/Transforms/SROA/irregular-type.ll b/llvm/test/Transforms/SROA/irregular-type.ll
deleted file mode 100644
index db1cb9c2a0773..0000000000000
--- a/llvm/test/Transforms/SROA/irregular-type.ll
+++ /dev/null
@@ -1,48 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -sroa -S | FileCheck %s
-
-%S = type { [4 x i8] }
-
-; Ensure the load/store of integer types whose size is not equal to the store
-; size are not split.
-
-define i8 @foo(i23 %0) {
-; CHECK-LABEL: @foo(
-; CHECK-NEXT:  Entry:
-; CHECK-NEXT:    [[DOTSROA_0:%.*]] = alloca [3 x i8], align 8
-; CHECK-NEXT:    [[DOTSROA_0_0__SROA_CAST1:%.*]] = bitcast [3 x i8]* [[DOTSROA_0]] to i23*
-; CHECK-NEXT:    store i23 [[TMP0:%.*]], i23* [[DOTSROA_0_0__SROA_CAST1]], align 8
-; CHECK-NEXT:    [[DOTSROA_0_1__SROA_IDX2:%.*]] = getelementptr inbounds [3 x i8], [3 x i8]* [[DOTSROA_0]], i64 0, i64 1
-; CHECK-NEXT:    [[DOTSROA_0_1__SROA_0_1_:%.*]] = load i8, i8* [[DOTSROA_0_1__SROA_IDX2]], align 1
-; CHECK-NEXT:    ret i8 [[DOTSROA_0_1__SROA_0_1_]]
-;
-Entry:
-  %1 = alloca %S
-  %2 = bitcast %S* %1 to i23*
-  store i23 %0, i23* %2
-  %3 = getelementptr inbounds %S, %S* %1, i64 0, i32 0, i32 1
-  %4 = load i8, i8* %3
-  ret i8 %4
-}
-
-define i32 @bar(i16 %0) {
-; CHECK-LABEL: @bar(
-; CHECK-NEXT:  Entry:
-; CHECK-NEXT:    [[DOTSROA_0:%.*]] = alloca [3 x i8], align 8
-; CHECK-NEXT:    [[DOTSROA_0_0__SROA_CAST2:%.*]] = bitcast [3 x i8]* [[DOTSROA_0]] to i16*
-; CHECK-NEXT:    store i16 [[TMP0:%.*]], i16* [[DOTSROA_0_0__SROA_CAST2]], align 8
-; CHECK-NEXT:    [[DOTSROA_0_0_Q_SROA_CAST1:%.*]] = bitcast [3 x i8]* [[DOTSROA_0]] to i17*
-; CHECK-NEXT:    [[DOTSROA_0_0__SROA_0_0_:%.*]] = load i17, i17* [[DOTSROA_0_0_Q_SROA_CAST1]], align 8
-; CHECK-NEXT:    [[TMP1:%.*]] = zext i17 [[DOTSROA_0_0__SROA_0_0_]] to i32
-; CHECK-NEXT:    ret i32 [[TMP1]]
-;
-Entry:
-  %1 = alloca %S
-  %2 = bitcast %S* %1 to i16*
-  store i16 %0, i16* %2
-  %3 = getelementptr inbounds %S, %S* %1, i64 0, i32 0
-  %q = bitcast [4 x i8]* %3 to i17*
-  %4 = load i17, i17* %q
-  %5 = zext i17 %4 to i32
-  ret i32 %5
-}


        


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