[PATCH] D103659: [AMDGPU][GlobalISel] Try to use op_sel when selecting packed instructions

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3326
+// Strip G_BITCAST and G_FNEG and return the source register of the result. If
+// any G_FNEG were encountered, xor the value in FNeg.
+static Register
----------------
Nit: "xor it with what??". How about "flip the value" instead?


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3331
+
+  MachineInstr *MI = MRI.getVRegDef(Src);
+  while (MI->getOpcode() == AMDGPU::G_BITCAST ||
----------------
Everywhere that you use getVRegDef, do you also potentially need to look through copies as well?


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3382
+
+  return MCRegister::NoRegister;
+}
----------------
Just use `Register()` instead of `MCRegister::NoRegister`. Same in a few other places below.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:3433
+
+    // G_OR operands should be result from a G_AND 0xffff (Lo) and a G_SHL 16
+    // (Hi)
----------------
Is there a chance that the G_AND would already have been optimized away, e.g. if Lo was a constant or was otherwise known not to have any high bits set?


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  https://reviews.llvm.org/D103659/new/

https://reviews.llvm.org/D103659