[llvm] 2927d40 - GlobalISel: Hide virtual register creation in MIRBuilder

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2021-06-08T14:44:24-04:00
New Revision: 2927d40f044650e787985235a1d3d76db345cf87

URL: https://github.com/llvm/llvm-project/commit/2927d40f044650e787985235a1d3d76db345cf87
DIFF: https://github.com/llvm/llvm-project/commit/2927d40f044650e787985235a1d3d76db345cf87.diff

LOG: GlobalISel: Hide virtual register creation in MIRBuilder

Added: 
    

Modified: 
    llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 5478cb1d99eb..448e80960cc4 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -2791,17 +2791,15 @@ LegalizerHelper::lowerLoad(MachineInstr &MI) {
       LLT PtrTy = MRI.getType(PtrReg);
       unsigned AnyExtSize = NextPowerOf2(DstTy.getSizeInBits());
       LLT AnyExtTy = LLT::scalar(AnyExtSize);
-      Register LargeLdReg = MRI.createGenericVirtualRegister(AnyExtTy);
-      Register SmallLdReg = MRI.createGenericVirtualRegister(AnyExtTy);
       auto LargeLoad = MIRBuilder.buildLoadInstr(
-        TargetOpcode::G_ZEXTLOAD, LargeLdReg, PtrReg, *LargeMMO);
+        TargetOpcode::G_ZEXTLOAD, AnyExtTy, PtrReg, *LargeMMO);
 
       auto OffsetCst = MIRBuilder.buildConstant(
         LLT::scalar(PtrTy.getSizeInBits()), LargeSplitSize / 8);
       Register PtrAddReg = MRI.createGenericVirtualRegister(PtrTy);
       auto SmallPtr =
         MIRBuilder.buildPtrAdd(PtrAddReg, PtrReg, OffsetCst);
-      auto SmallLoad = MIRBuilder.buildLoad(SmallLdReg, SmallPtr,
+      auto SmallLoad = MIRBuilder.buildLoad(AnyExtTy, SmallPtr,
                                             *SmallMMO);
 
       auto ShiftAmt = MIRBuilder.buildConstant(AnyExtTy, LargeSplitSize);