[PATCH] D99355: Implementation of intrinsic and SDNode definitions for VP load, store, gather, scatter.

Hussain Kadhem via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 8 10:24:12 PDT 2021


hussainjk added inline comments.


================
Comment at: llvm/include/llvm/CodeGen/SelectionDAGNodes.h:1367
     // with either an intrinsic or a target opcode.
-    return N->getOpcode() == ISD::LOAD                ||
-           N->getOpcode() == ISD::STORE               ||
-           N->getOpcode() == ISD::PREFETCH            ||
-           N->getOpcode() == ISD::ATOMIC_CMP_SWAP     ||
+    return N->getOpcode() == ISD::LOAD || N->getOpcode() == ISD::STORE ||
+           N->getOpcode() == ISD::PREFETCH ||
----------------
craig.topper wrote:
> hussainjk wrote:
> > frasercrmck wrote:
> > > craig.topper wrote:
> > > > Can we override clang-format here? The previous code had a more consistent structure.
> > > Alternatively, I suppose, it could be a switch statement (aside from the last two)? Presumably that'd be optimized well enough by compilers?
> > It seems like this style is more idiomatic in the surrounding code, so leaving it as-is for now (with spacing fixed).
> > 
> Was this idiomatic comment referring to my comment or the switch suggestion?
> 
> If we don't do a switch I'd like to see it back the way it was originally so that each opcode is on one line. We can put clang-format off/on around it to suppress the clang format warning.
Regarding the switch, but I've gone ahead and changed it to a switch statement.


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  https://reviews.llvm.org/D99355/new/

https://reviews.llvm.org/D99355



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