[PATCH] D103153: [InstCombine] Add fold for extracting known elements from a stepvector
Caroline via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 8 10:15:44 PDT 2021
CarolineConcatto marked 2 inline comments as done.
CarolineConcatto added inline comments.
================
Comment at: llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp:361
+ // vector to truncate the index safely.
+ if (IndexC->getValue().getActiveBits() <= (BitWidth - 1)) {
+ auto *Idx =
----------------
foad wrote:
> All these quantities are unsigned so there is no need to subtract 1 for the sign bit.
LLVM-IR always surprising me.
I was surprised when the test replaced 255 by -1.
But if llvm-ir does not reserve 1 bit for sign I accept that -1 is equal to 255.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103153/new/
https://reviews.llvm.org/D103153
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