[PATCH] D103820: [X86] Prefer vpmovq2m over vpternlogd + vpcmpgtq
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 7 11:08:25 PDT 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:22802
+ if (SetCCOpcode == ISD::SETGT && ISD::isBuildVectorAllOnes(Op1.getNode())) {
+ SetCCOpcode = ISD::SETGE;
+ Op1 = DAG.getConstant(0, dl, Op1.getValueType());
----------------
davezarzycki wrote:
> craig.topper wrote:
> > I'm a little confused. the vpmovq2m patter is (setgt imm_allzeros, X). Does this SETGE get canonicalized again?
> Oh, sorry about that. I originally made a logic error and converted > -1 to < 0 instead of >= 0; but at that time, I did verify that VPMOVQ2M was generated. You are right that the desired instruction is not generated with SETGE now that the logic error is fixed. In any case, I'd like to update the tests ahead of any code change. Is there a preferred file to put the current suboptimal code gen?
avx512-vec-cmp.ll seems like a decent file to put it in.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D103820/new/
https://reviews.llvm.org/D103820
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