[PATCH] D103597: [AArch64] Modified AArch64LoadStoreOptimizer to generate STP instructions for memcpys

Mon Jun 7 09:56:02 PDT 2021

fhahn added a comment.

This does not seem `memcpy` specific. If that's the case, could you please update the title/description of the patch? Also the test cases in `llvm/test/CodeGen/AArch64/memcpy.mir` seem to specifically test additional renaming cases, so it might be good to put them into the existing  `llvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir` or into a file named along those lines. it would also be good to include a brief comment with the tests what is different to the existing re-naming tests.

================
Comment at: llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp:1521
+static bool
+regHasBeenRenamed(Optional<bool> MaybeCanRename, LdStPairFlags &Flags,
+                  MachineInstr &FirstMI, MachineInstr &MI,
----------------
The comment and the name seem to indicate that this function checks whether a register has been renamed or not, but I don't think that's the case.

The function checks if ice can rename from `FirstMI` to the beginning of the block and if it can, then it updates `Flags` with a register that can be used for renaming, if such a register has been found.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103597/new/

https://reviews.llvm.org/D103597