[PATCH] D103808: [ARM] Generate VDUP(Const) from constant buildvectors

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham added a comment.

Looks like an obviously good thing, and I only have one nitpick.



================
Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:7681
+        SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const);
+        return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, VDup);
+      }
----------------
You've used VECTOR_REG_CAST where other branches of this code have BITCAST.

As far as I can see, either one will work provided the constant is constructed right (e.g. if you wanted to make a v16i8 containing 1,2,3,4,1,2,3,4,... then you might have to vdup 0x01020304 or 0x04030201 depending which cast you wanted to use afterwards). But I don't see any big-endian test to demonstrate it picking the right one. Unless I've missed one, could you add it?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103808/new/

https://reviews.llvm.org/D103808