[PATCH] D103733: [AMDGPU] Allow oversize vaddr in GFX10 MIMG assembly

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

dp added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp:3457
+  // vaddr maybe oversize if it is one of the defined size classes
+  switch (VAddrSize) {
+  case 1:
----------------
To preserve backward compatibility with existing code it would be sufficient to allow size=8 when 5 is required. I'm not sure if we need to enable other cases.

As a minor note I think the code would be more readable if we do the following change:
    VAddrSize -> ActualAddrSize
    AddrSize -> ExpectedAddrSize


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103733/new/

https://reviews.llvm.org/D103733