[PATCH] D103197: [AMDGPU] All GWS instructions need aligned VGPR on gfx90a
    Matt Arsenault via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Tue Jun  1 16:29:45 PDT 2021
    
    
  
arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.
LGTM plus comment
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:1394
+
+    if (STI.needsAlignedVGPRs()) {
+      Register Undef = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass);
----------------
Should add a comment explaining this hack
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103197/new/
https://reviews.llvm.org/D103197
    
    
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