[PATCH] D102759: [AArch64ISelDAGToDAG] Supplement cases for ORRWrs/ORRXrs when calculating usefulbits

[Tiehu Zhang via Phabricator via llvm-commits]

TiehuZhang marked 5 inline comments as done.
TiehuZhang added a comment.

ping



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2308
       return;
+    if (UserNode->getOperand(0) == Orig)
+      return;
----------------
sdesmalen wrote:
> nit: Can you write it as:
> 
>   case AArch64::ORRWrs:
>   case AArch64::ORRXrs:
>     if (UserNode->getOperand(0) != Orig && UserNode->getOperand(1) == Orig)
>       getUsefulBitsFromOrWith..(...);
>     return;
> 
> That's a little easier to read.
Done, thanks for your suggestion


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2319
     if (UserNode->getOperand(0) != Orig)
       return;
     UsefulBits &= APInt(UsefulBits.getBitWidth(), 0xff);
----------------
efriedma wrote:
> Do these store instructions have the same issue?
If x(an usee) is used on an unpredicatable instruction, then all its bits are useful. The current implementation does not seem to be exceptional, I think.


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