[PATCH] D103742: [RISCV] Support vector maximum and minimum for RVP

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:842
         setCondCodeAction(CC, VT, Expand);
+      setOperationAction(ISD::VSELECT, VT, Legal);
 
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What about cases where it isn't min/max? You'll have an unselectable vselect.

Why aren't not make ISD::SMAX and ISD::SMIN legal and match those?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103742/new/

https://reviews.llvm.org/D103742