[PATCH] D103740: [RISCV] Support vector comparision for RVP

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:816
+    // Expand unsupported CCs, RVP only natively supports EQ, SLT, SLE
+    // ULT, ULE. There are expanded to their swapped-operand CCs.
+    ISD::CondCode RVPCCToExpand[] = {
----------------
This comment isn't entirely correct. NE does not use swapped-operands.


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Comment at: llvm/test/CodeGen/RISCV/rvp/vector-cmp.ll:51
 ; RV32-NEXT:    addi a1, zero, -1
-; RV32-NEXT:    addi a2, zero, -1
-; RV32-NEXT:    bne a3, a0, .LBB2_2
-; RV32-NEXT:  # %bb.1:
-; RV32-NEXT:    mv a2, zero
-; RV32-NEXT:  .LBB2_2:
-; RV32-NEXT:    lbu a0, 12(sp)
-; RV32-NEXT:    lbu a4, 8(sp)
-; RV32-NEXT:    addi a3, zero, -1
-; RV32-NEXT:    bne a4, a0, .LBB2_4
-; RV32-NEXT:  # %bb.3:
-; RV32-NEXT:    mv a3, zero
-; RV32-NEXT:  .LBB2_4:
-; RV32-NEXT:    lbu a4, 14(sp)
-; RV32-NEXT:    lbu a5, 10(sp)
-; RV32-NEXT:    mv a0, zero
-; RV32-NEXT:    insb a0, a3, 0
-; RV32-NEXT:    insb a0, a2, 1
-; RV32-NEXT:    addi a2, zero, -1
-; RV32-NEXT:    bne a5, a4, .LBB2_6
-; RV32-NEXT:  # %bb.5:
-; RV32-NEXT:    mv a2, zero
-; RV32-NEXT:  .LBB2_6:
-; RV32-NEXT:    lbu a3, 15(sp)
-; RV32-NEXT:    lbu a4, 11(sp)
-; RV32-NEXT:    insb a0, a2, 2
-; RV32-NEXT:    bne a4, a3, .LBB2_8
-; RV32-NEXT:  # %bb.7:
-; RV32-NEXT:    mv a1, zero
-; RV32-NEXT:  .LBB2_8:
-; RV32-NEXT:    insb a0, a1, 3
-; RV32-NEXT:    addi sp, sp, 16
+; RV32-NEXT:    xor a0, a0, a1
 ; RV32-NEXT:    ret
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Why isn't this using xori?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103740/new/

https://reviews.llvm.org/D103740