[llvm] 8524977 - [X86] AMD Zen 3: double the LoopMicroOpBufferSize

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2021-06-05T01:23:58+03:00
New Revision: 852497711dae35f978a7a3f2e1889fc8fe15fc3b

URL: https://github.com/llvm/llvm-project/commit/852497711dae35f978a7a3f2e1889fc8fe15fc3b
DIFF: https://github.com/llvm/llvm-project/commit/852497711dae35f978a7a3f2e1889fc8fe15fc3b.diff

LOG: [X86] AMD Zen 3: double the LoopMicroOpBufferSize

While the IndVars issue (PR50384) has been resolved,
and the compile performance improved, a new blocker emerged,
the codegen machine instruction scheduling is also quadratic.
So we still can't really specify the right value here.

Filed PR50584.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ScheduleZnver3.td

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ScheduleZnver3.td b/llvm/lib/Target/X86/X86ScheduleZnver3.td
index fae9b1b51ef1..599f0b5de74e 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver3.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver3.td
@@ -35,10 +35,11 @@ def Znver3Model : SchedMachineModel {
   // The maximum capacity of the op cache is 4K ops.
   // Agner, 22.5 µop cache
   // The size of the µop cache is big enough for holding most critical loops.
-  // FIXME: PR50384: IndVars has quadradic complexity, with large values here
-  //        the compilation of certain loops ends up taking way too long.
+  // FIXME: PR50584: MachineScheduler/PostRAScheduler have quadradic complexity,
+  //        with large values here the compilation of certain loops
+  //        ends up taking way too long.
   // let LoopMicroOpBufferSize = 4096;
-  let LoopMicroOpBufferSize = 256;
+  let LoopMicroOpBufferSize = 512;
   // AMD SOG 19h, 2.6.2 L1 Data Cache
   // The L1 data cache has a 4- or 5- cycle integer load-to-use latency.
   // AMD SOG 19h, 2.12 L1 Data Cache