[PATCH] D103597: [AArch64] Modified AArch64LoadStoreOptimizer to generate STP instructions for memcpys

Fri Jun 4 00:27:53 PDT 2021

SjoerdMeijer added inline comments.

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Comment at: llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp:1712
+        if (TRI->isSuperOrSubRegisterEq(Reg, getLdStRegOp(MI).getReg()) &&
+            MIAlign > 16) {
+          bool renamedReg =
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Hmmmm, this hard coded 16 here....

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Comment at: llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp:1727
+            TRI->isSuperOrSubRegisterEq(Reg, getLdStRegOp(MI).getReg()) &&
+            MIAlign <= 16) {
           LiveRegUnits::accumulateUsedDefed(MI, ModifiedRegUnits, UsedRegUnits,
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... and here, makes this look like a not very general approach.

I was hoping that we wouldn't need these alignment checks. We would possibly optimise other cases too, but that would be good. Or is there something else going on?

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Comment at: llvm/test/CodeGen/AArch64/memcpy.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-linux-gnu -aarch64-load-store-renaming=true | FileCheck %s --check-prefix=CHECK-RENAME
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Now that we have the MIR tests, I don't think we need these llc tests, it doesn't add anything, so you can just remove this file.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103597/new/

https://reviews.llvm.org/D103597