[llvm] d8b9ed7 - [AArch64] Add regression test for missed bfi optimization.

[Eli Friedman via llvm-commits]

Author: Eli Friedman
Date: 2021-06-02T17:38:51-07:00
New Revision: d8b9ed72ee838145a5c48d8b6fdccd00dc200c42

URL: https://github.com/llvm/llvm-project/commit/d8b9ed72ee838145a5c48d8b6fdccd00dc200c42
DIFF: https://github.com/llvm/llvm-project/commit/d8b9ed72ee838145a5c48d8b6fdccd00dc200c42.diff

LOG: [AArch64] Add regression test for missed bfi optimization.

(See https://reviews.llvm.org/D60358 for the transform that breaks this
case.)

Added: 
    

Modified: 
    llvm/test/CodeGen/AArch64/bitfield-insert.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AArch64/bitfield-insert.ll b/llvm/test/CodeGen/AArch64/bitfield-insert.ll
index 3015844c9cbed..37e3a34d5bcee 100644
--- a/llvm/test/CodeGen/AArch64/bitfield-insert.ll
+++ b/llvm/test/CodeGen/AArch64/bitfield-insert.ll
@@ -576,3 +576,18 @@ define <2 x i32> @test_complex_type(<2 x i32>* %addr, i64 %in, i64* %bf ) {
 
   ret <2 x i32> %vec
 }
+
+define i64 @test_truncated_shift(i64 %x, i64 %y) {
+; CHECK-LABEL: test_truncated_shift:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    lsl w8, w1, #25
+; CHECK-NEXT:    lsr x8, x8, #25
+; CHECK-NEXT:    bfi x0, x8, #25, #5
+; CHECK-NEXT:    ret
+entry:
+  %and = and i64 %x, -1040187393
+  %shl4 = shl i64 %y, 25
+  %and5 = and i64 %shl4, 1040187392
+  %or = or i64 %and5, %and
+  ret i64 %or
+}