[PATCH] D103435: [PoC][RISCV] Define a symbol flags and a dynamic tag to avoid lazy binding for vector calls.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp:153
+
+void RISCVTargetAsmStreamer::emitDirectiveVariantCC(MCSymbol *Symbol) {
+  OS << "\t.variant_cc\t" << Symbol->getName() << "\n";
----------------
Put with the other emitDirective* methods?


================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h:40
+  /// Callback used to implement the .variant_cc directive.
+  virtual void emitDirectiveVariantCC(MCSymbol *Symbol);
 };
----------------
Maybe put this with the other emitDirective* declarations?


================
Comment at: llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp:204
+  if (ST.getRegisterInfo()->hasRVVArgsOrReturn(MF)) {
+    auto *TS =
+        static_cast<RISCVTargetStreamer *>(OutStreamer->getTargetStreamer());
----------------
Use a reference liek the two functions right above this for consistency.


================
Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:358
+  if (Subtarget.useRVVForFixedLengthVectors()) {
+    return isa<VectorType>(F.getReturnType()) ||
+           any_of(F.args(), [](const Argument &Arg) {
----------------
This is incorrect if the element size of the vector is larger than i64. Not sure how much that matters in practice since it would be pretty unusual to have such a vector argument/return.

I was really hoping to find a way to get this from Machine IR directly. MachineRegisterInfo does have a list of livein physical registers, but I can't find anywhere that knows what physical registers are used for returns


Repository:
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  https://reviews.llvm.org/D103435/new/

https://reviews.llvm.org/D103435