[PATCH] D103419: [VectorCombine] Fix alignment in single element store

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added inline comments.


================
Comment at: llvm/lib/Transforms/Vectorize/VectorCombine.cpp:835
+    Align NewAlignment(1);
+    if (auto *C = dyn_cast<ConstantInt>(Idx)) {
+      NewAlignment = std::max(SI->getAlign(), Load->getAlign());
----------------
(alive *seems* to be happy with this)
This is going to be precise and optimal for constant indexes,
but i think we can get at least the lower-bound estimate for variable indexes:
the new address will be offset from the base address by `DL.getTypeStoreSize(NewElement->getType())`,
so i think we can do 
```
else
  NewAlignment = commonAlignment(
          NewAlignment,
          DL.getTypeStoreSize(NewElement->getType()));
```
Please add positive tests:
```
; New alignment should be 8
define void @src(<8 x i64>* %q, i64 %s, i32 %idx) {
  %cmp = icmp ult i32 %idx, 2
  call void @llvm.assume(i1 %cmp)

  %i = load <8 x i64>, <8 x i64>* %q, align 8
  %vecins = insertelement <8 x i64> %i, i64 %s, i32 %idx
  store <8 x i64> %vecins, <8 x i64>* %q, align 8
  ret void
}

; New alignment should be 4
define void @src(<8 x i64>* %q, i64 %s, i32 %idx) {
  %cmp = icmp ult i32 %idx, 2
  call void @llvm.assume(i1 %cmp)

  %i = load <8 x i64>, <8 x i64>* %q, align 4
  %vecins = insertelement <8 x i64> %i, i64 %s, i32 %idx
  store <8 x i64> %vecins, <8 x i64>* %q, align 4
  ret void
}
```


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D103419/new/

https://reviews.llvm.org/D103419