[PATCH] D103342: [AtomicExpand] Merge cmpxchg success and failure ordering when appropriate.

Eli Friedman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 28 14:22:10 PDT 2021


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If we're not emitting separate fences for the success/failure cases, we need to pass the merged ordering to the target so it can emit the correct instructions.

For the PowerPC testcase, we end up with extra fences, but that seems like an improvement over missing fences.  If someone wants to improve that, the PowerPC backed could be taught to emit the fences after isel, instead of depending on fences emitted by AtomicExpand.

Fixes https://bugs.llvm.org/show_bug.cgi?id=33332 .


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D103342

Files:
  llvm/include/llvm/IR/Instructions.h
  llvm/lib/CodeGen/AtomicExpandPass.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
  llvm/test/CodeGen/PowerPC/atomics-regression.ll
  llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll

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