[llvm] 0b3b0a7 - [AArch64][RISCV] Make sure isel correctly honors failure orderings.

Eli Friedman via llvm-commits llvm-commits at lists.llvm.org
Fri May 28 12:47:54 PDT 2021


Author: Eli Friedman
Date: 2021-05-28T12:47:40-07:00
New Revision: 0b3b0a727ad6bac089a57e3625dd9dbf4e6f5bde

URL: https://github.com/llvm/llvm-project/commit/0b3b0a727ad6bac089a57e3625dd9dbf4e6f5bde
DIFF: https://github.com/llvm/llvm-project/commit/0b3b0a727ad6bac089a57e3625dd9dbf4e6f5bde.diff

LOG: [AArch64][RISCV] Make sure isel correctly honors failure orderings.

If a cmpxchg specifies acquire or seq_cst on failure, make sure we
generate code consistent with that ordering even if the success ordering
is not acquire/seq_cst.

At one point, it was ambiguous whether this sort of construct was valid,
but the C++ standad and LLVM now accept arbitrary combinations of
success/failure orderings.

This doesn't address the corresponding issue in AtomicExpand. (This was
reported as https://bugs.llvm.org/show_bug.cgi?id=33332 .)

Fixes https://bugs.llvm.org/show_bug.cgi?id=50512.

Differential Revision: https://reviews.llvm.org/D103284

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
    llvm/include/llvm/CodeGen/MachineMemOperand.h
    llvm/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
    llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
    llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
    llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
    llvm/utils/TableGen/CodeGenDAGPatterns.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
index 25c07f8b4f28b..d9814962d11d8 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
@@ -390,7 +390,7 @@ bool InstructionSelector::executeMatchTable(
           return false;
 
       for (const auto &MMO : State.MIs[InsnID]->memoperands())
-        if (MMO->getOrdering() != Ordering)
+        if (MMO->getMergedOrdering() != Ordering)
           if (handleReject() == RejectAndGiveUp)
             return false;
       break;
@@ -408,7 +408,7 @@ bool InstructionSelector::executeMatchTable(
           return false;
 
       for (const auto &MMO : State.MIs[InsnID]->memoperands())
-        if (!isAtLeastOrStrongerThan(MMO->getOrdering(), Ordering))
+        if (!isAtLeastOrStrongerThan(MMO->getMergedOrdering(), Ordering))
           if (handleReject() == RejectAndGiveUp)
             return false;
       break;
@@ -426,7 +426,7 @@ bool InstructionSelector::executeMatchTable(
           return false;
 
       for (const auto &MMO : State.MIs[InsnID]->memoperands())
-        if (!isStrongerThan(Ordering, MMO->getOrdering()))
+        if (!isStrongerThan(Ordering, MMO->getMergedOrdering()))
           if (handleReject() == RejectAndGiveUp)
             return false;
       break;

diff  --git a/llvm/include/llvm/CodeGen/MachineMemOperand.h b/llvm/include/llvm/CodeGen/MachineMemOperand.h
index 0823164c32c13..df8b287b733d7 100644
--- a/llvm/include/llvm/CodeGen/MachineMemOperand.h
+++ b/llvm/include/llvm/CodeGen/MachineMemOperand.h
@@ -255,6 +255,23 @@ class MachineMemOperand {
     return static_cast<AtomicOrdering>(AtomicInfo.FailureOrdering);
   }
 
+  /// Return a single atomic ordering that is at least as strong as both the
+  /// success and failure orderings for an atomic operation.  (For operations
+  /// other than cmpxchg, this is equivalent to getOrdering().)
+  AtomicOrdering getMergedOrdering() const {
+    AtomicOrdering Ordering = getOrdering();
+    AtomicOrdering FailureOrdering = getFailureOrdering();
+    if (FailureOrdering == AtomicOrdering::SequentiallyConsistent)
+      return AtomicOrdering::SequentiallyConsistent;
+    if (FailureOrdering == AtomicOrdering::Acquire) {
+      if (Ordering == AtomicOrdering::Monotonic)
+        return AtomicOrdering::Acquire;
+      if (Ordering == AtomicOrdering::Release)
+        return AtomicOrdering::AcquireRelease;
+    }
+    return Ordering;
+  }
+
   bool isLoad() const { return FlagVals & MOLoad; }
   bool isStore() const { return FlagVals & MOStore; }
   bool isVolatile() const { return FlagVals & MOVolatile; }

diff  --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
index 155affadd73b9..43f35270f1962 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -1306,6 +1306,11 @@ class MemSDNode : public SDNode {
   /// store occurs.
   AtomicOrdering getOrdering() const { return MMO->getOrdering(); }
 
+  /// Return a single atomic ordering that is at least as strong as both the
+  /// success and failure orderings for an atomic operation.  (For operations
+  /// other than cmpxchg, this is equivalent to getOrdering().)
+  AtomicOrdering getMergedOrdering() const { return MMO->getMergedOrdering(); }
+
   /// Return true if the memory operation ordering is Unordered or higher.
   bool isAtomic() const { return MMO->isAtomic(); }
 

diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 7877b8ca3a136..48a4e32e405dc 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -3895,7 +3895,7 @@ void SelectionDAGLegalize::ConvertNodeToLibcall(SDNode *Node) {
   case ISD::ATOMIC_LOAD_UMAX:
   case ISD::ATOMIC_CMP_SWAP: {
     MVT VT = cast<AtomicSDNode>(Node)->getMemoryVT().getSimpleVT();
-    AtomicOrdering Order = cast<AtomicSDNode>(Node)->getOrdering();
+    AtomicOrdering Order = cast<AtomicSDNode>(Node)->getMergedOrdering();
     RTLIB::Libcall LC = RTLIB::getOUTLINE_ATOMIC(Opc, Order, VT);
     EVT RetVT = Node->getValueType(0);
     TargetLowering::MakeLibCallOptions CallOptions;

diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 2b075a08efe46..e89d276fbf4b7 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -2225,7 +2225,7 @@ void DAGTypeLegalizer::ExpandIntegerResult(SDNode *N, unsigned ResNo) {
 std::pair <SDValue, SDValue> DAGTypeLegalizer::ExpandAtomic(SDNode *Node) {
   unsigned Opc = Node->getOpcode();
   MVT VT = cast<AtomicSDNode>(Node)->getMemoryVT().getSimpleVT();
-  AtomicOrdering order = cast<AtomicSDNode>(Node)->getOrdering();
+  AtomicOrdering order = cast<AtomicSDNode>(Node)->getMergedOrdering();
   // Lower to outline atomic libcall if outline atomics enabled,
   // or to sync libcall otherwise
   RTLIB::Libcall LC = RTLIB::getOUTLINE_ATOMIC(Opc, order, VT);

diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index dc5dd73c7cfd8..0deba5ce40c15 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -16675,7 +16675,7 @@ static void ReplaceCMP_SWAP_128Results(SDNode *N,
     MachineMemOperand *MemOp = cast<MemSDNode>(N)->getMemOperand();
 
     unsigned Opcode;
-    switch (MemOp->getOrdering()) {
+    switch (MemOp->getMergedOrdering()) {
     case AtomicOrdering::Monotonic:
       Opcode = AArch64::CASPX;
       break;

diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index f4058fcb5d3f2..78fbf531ba02b 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -1096,7 +1096,7 @@ bool AArch64LegalizerInfo::legalizeAtomicCmpxchg128(
     //     %out = CASP %in1, ...
     //     %OldLo = G_EXTRACT %out, 0
     //     %OldHi = G_EXTRACT %out, 64
-    auto Ordering = (*MI.memoperands_begin())->getOrdering();
+    auto Ordering = (*MI.memoperands_begin())->getMergedOrdering();
     unsigned Opcode;
     switch (Ordering) {
     case AtomicOrdering::Acquire:

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
index 43d3a1e29c095..a0793c64a6cf4 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll
@@ -50,3 +50,49 @@ define void @val_compare_and_swap(i128* %p, i128 %oldval, i128 %newval) {
   store i128 %val, i128* %p
   ret void
 }
+
+define void @val_compare_and_swap_monotonic_seqcst(i128* %p, i128 %oldval, i128 %newval) {
+; CHECK-LLSC-O1-LABEL: val_compare_and_swap_monotonic_seqcst:
+; CHECK-LLSC-O1:    ldxp {{x[0-9]+}}, {{x[0-9]+}}, [x0]
+; [... LOTS of stuff that is generic IR unrelated to atomic operations ...]
+; CHECK-LLSC-O1:    stxp {{w[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, [x0]
+;
+; CHECK-CAS-O1-LABEL: val_compare_and_swap_monotonic_seqcst:
+; CHECK-CAS-O1:    caspal x2, x3, x4, x5, [x0]
+
+; CHECK-LLSC-O0-LABEL: val_compare_and_swap_monotonic_seqcst:
+; CHECK-LLSC-O0:  .LBB1_1:
+; CHECK-LLSC-O0:    ldaxp
+; CHECK-LLSC-O0:    stlxp
+
+; CHECK-CAS-O0-LABEL: val_compare_and_swap_monotonic_seqcst:
+; CHECK-CAS-O0:    caspal
+
+  %pair = cmpxchg i128* %p, i128 %oldval, i128 %newval monotonic seq_cst
+  %val = extractvalue { i128, i1 } %pair, 0
+  store i128 %val, i128* %p
+  ret void
+}
+
+define void @val_compare_and_swap_release_acquire(i128* %p, i128 %oldval, i128 %newval) {
+; CHECK-LLSC-O1-LABEL: val_compare_and_swap_release_acquire:
+; CHECK-LLSC-O1:    ldxp {{x[0-9]+}}, {{x[0-9]+}}, [x0]
+; [... LOTS of stuff that is generic IR unrelated to atomic operations ...]
+; CHECK-LLSC-O1:    stlxp {{w[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, [x0]
+;
+; CHECK-CAS-O1-LABEL: val_compare_and_swap_release_acquire:
+; CHECK-CAS-O1:    caspal x2, x3, x4, x5, [x0]
+
+; CHECK-LLSC-O0-LABEL: val_compare_and_swap_release_acquire:
+; CHECK-LLSC-O0:  .LBB2_1:
+; CHECK-LLSC-O0:    ldaxp
+; CHECK-LLSC-O0:    stlxp
+
+; CHECK-CAS-O0-LABEL: val_compare_and_swap_release_acquire:
+; CHECK-CAS-O0:    caspal
+
+  %pair = cmpxchg i128* %p, i128 %oldval, i128 %newval release acquire
+  %val = extractvalue { i128, i1 } %pair, 0
+  store i128 %val, i128* %p
+  ret void
+}

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
index 90c117affc76c..b1b5cc1c511b3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
@@ -209,16 +209,116 @@ define i64 @val_compare_and_swap_64(i64* %p, i64 %cmp, i64 %new) #0 {
   ret i64 %val
 }
 
+define i64 @val_compare_and_swap_64_monotonic_seqcst(i64* %p, i64 %cmp, i64 %new) #0 {
+; CHECK-NOLSE-O1-LABEL: val_compare_and_swap_64_monotonic_seqcst:
+; CHECK-NOLSE-O1:       ; %bb.0:
+; CHECK-NOLSE-O1-NEXT:  LBB4_1: ; %cmpxchg.start
+; CHECK-NOLSE-O1-NEXT:    ; =>This Inner Loop Header: Depth=1
+; CHECK-NOLSE-O1-NEXT:    ldxr x8, [x0]
+; CHECK-NOLSE-O1-NEXT:    cmp x8, x1
+; CHECK-NOLSE-O1-NEXT:    b.ne LBB4_4
+; CHECK-NOLSE-O1-NEXT:  ; %bb.2: ; %cmpxchg.trystore
+; CHECK-NOLSE-O1-NEXT:    ; in Loop: Header=BB4_1 Depth=1
+; CHECK-NOLSE-O1-NEXT:    stxr w9, x2, [x0]
+; CHECK-NOLSE-O1-NEXT:    cbnz w9, LBB4_1
+; CHECK-NOLSE-O1-NEXT:  ; %bb.3: ; %cmpxchg.end
+; CHECK-NOLSE-O1-NEXT:    mov x0, x8
+; CHECK-NOLSE-O1-NEXT:    ret
+; CHECK-NOLSE-O1-NEXT:  LBB4_4: ; %cmpxchg.nostore
+; CHECK-NOLSE-O1-NEXT:    clrex
+; CHECK-NOLSE-O1-NEXT:    mov x0, x8
+; CHECK-NOLSE-O1-NEXT:    ret
+;
+; CHECK-NOLSE-O0-LABEL: val_compare_and_swap_64_monotonic_seqcst:
+; CHECK-NOLSE-O0:       ; %bb.0:
+; CHECK-NOLSE-O0-NEXT:    mov x9, x0
+; CHECK-NOLSE-O0-NEXT:  LBB4_1: ; =>This Inner Loop Header: Depth=1
+; CHECK-NOLSE-O0-NEXT:    ldaxr x0, [x9]
+; CHECK-NOLSE-O0-NEXT:    cmp x0, x1
+; CHECK-NOLSE-O0-NEXT:    b.ne LBB4_3
+; CHECK-NOLSE-O0-NEXT:  ; %bb.2: ; in Loop: Header=BB4_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:    stlxr w8, x2, [x9]
+; CHECK-NOLSE-O0-NEXT:    cbnz w8, LBB4_1
+; CHECK-NOLSE-O0-NEXT:  LBB4_3:
+; CHECK-NOLSE-O0-NEXT:    ret
+;
+; CHECK-LSE-O1-LABEL: val_compare_and_swap_64_monotonic_seqcst:
+; CHECK-LSE-O1:       ; %bb.0:
+; CHECK-LSE-O1-NEXT:    casal x1, x2, [x0]
+; CHECK-LSE-O1-NEXT:    mov x0, x1
+; CHECK-LSE-O1-NEXT:    ret
+;
+; CHECK-LSE-O0-LABEL: val_compare_and_swap_64_monotonic_seqcst:
+; CHECK-LSE-O0:       ; %bb.0:
+; CHECK-LSE-O0-NEXT:    mov x8, x0
+; CHECK-LSE-O0-NEXT:    mov x0, x1
+; CHECK-LSE-O0-NEXT:    casal x0, x2, [x8]
+; CHECK-LSE-O0-NEXT:    ret
+  %pair = cmpxchg i64* %p, i64 %cmp, i64 %new monotonic seq_cst
+  %val = extractvalue { i64, i1 } %pair, 0
+  ret i64 %val
+}
+
+define i64 @val_compare_and_swap_64_release_acquire(i64* %p, i64 %cmp, i64 %new) #0 {
+; CHECK-NOLSE-O1-LABEL: val_compare_and_swap_64_release_acquire:
+; CHECK-NOLSE-O1:       ; %bb.0:
+; CHECK-NOLSE-O1-NEXT:  LBB5_1: ; %cmpxchg.start
+; CHECK-NOLSE-O1-NEXT:    ; =>This Inner Loop Header: Depth=1
+; CHECK-NOLSE-O1-NEXT:    ldxr x8, [x0]
+; CHECK-NOLSE-O1-NEXT:    cmp x8, x1
+; CHECK-NOLSE-O1-NEXT:    b.ne LBB5_4
+; CHECK-NOLSE-O1-NEXT:  ; %bb.2: ; %cmpxchg.trystore
+; CHECK-NOLSE-O1-NEXT:    ; in Loop: Header=BB5_1 Depth=1
+; CHECK-NOLSE-O1-NEXT:    stlxr w9, x2, [x0]
+; CHECK-NOLSE-O1-NEXT:    cbnz w9, LBB5_1
+; CHECK-NOLSE-O1-NEXT:  ; %bb.3: ; %cmpxchg.end
+; CHECK-NOLSE-O1-NEXT:    mov x0, x8
+; CHECK-NOLSE-O1-NEXT:    ret
+; CHECK-NOLSE-O1-NEXT:  LBB5_4: ; %cmpxchg.nostore
+; CHECK-NOLSE-O1-NEXT:    clrex
+; CHECK-NOLSE-O1-NEXT:    mov x0, x8
+; CHECK-NOLSE-O1-NEXT:    ret
+;
+; CHECK-NOLSE-O0-LABEL: val_compare_and_swap_64_release_acquire:
+; CHECK-NOLSE-O0:       ; %bb.0:
+; CHECK-NOLSE-O0-NEXT:    mov x9, x0
+; CHECK-NOLSE-O0-NEXT:  LBB5_1: ; =>This Inner Loop Header: Depth=1
+; CHECK-NOLSE-O0-NEXT:    ldaxr x0, [x9]
+; CHECK-NOLSE-O0-NEXT:    cmp x0, x1
+; CHECK-NOLSE-O0-NEXT:    b.ne LBB5_3
+; CHECK-NOLSE-O0-NEXT:  ; %bb.2: ; in Loop: Header=BB5_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:    stlxr w8, x2, [x9]
+; CHECK-NOLSE-O0-NEXT:    cbnz w8, LBB5_1
+; CHECK-NOLSE-O0-NEXT:  LBB5_3:
+; CHECK-NOLSE-O0-NEXT:    ret
+;
+; CHECK-LSE-O1-LABEL: val_compare_and_swap_64_release_acquire:
+; CHECK-LSE-O1:       ; %bb.0:
+; CHECK-LSE-O1-NEXT:    casal x1, x2, [x0]
+; CHECK-LSE-O1-NEXT:    mov x0, x1
+; CHECK-LSE-O1-NEXT:    ret
+;
+; CHECK-LSE-O0-LABEL: val_compare_and_swap_64_release_acquire:
+; CHECK-LSE-O0:       ; %bb.0:
+; CHECK-LSE-O0-NEXT:    mov x8, x0
+; CHECK-LSE-O0-NEXT:    mov x0, x1
+; CHECK-LSE-O0-NEXT:    casal x0, x2, [x8]
+; CHECK-LSE-O0-NEXT:    ret
+  %pair = cmpxchg i64* %p, i64 %cmp, i64 %new release acquire
+  %val = extractvalue { i64, i1 } %pair, 0
+  ret i64 %val
+}
+
 define i32 @fetch_and_nand(i32* %p) #0 {
 ; CHECK-NOLSE-O1-LABEL: fetch_and_nand:
 ; CHECK-NOLSE-O1:       ; %bb.0:
-; CHECK-NOLSE-O1-NEXT:  LBB4_1: ; %atomicrmw.start
+; CHECK-NOLSE-O1-NEXT:  LBB6_1: ; %atomicrmw.start
 ; CHECK-NOLSE-O1-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; CHECK-NOLSE-O1-NEXT:    ldxr w8, [x0]
 ; CHECK-NOLSE-O1-NEXT:    and w9, w8, #0x7
 ; CHECK-NOLSE-O1-NEXT:    mvn w9, w9
 ; CHECK-NOLSE-O1-NEXT:    stlxr w10, w9, [x0]
-; CHECK-NOLSE-O1-NEXT:    cbnz w10, LBB4_1
+; CHECK-NOLSE-O1-NEXT:    cbnz w10, LBB6_1
 ; CHECK-NOLSE-O1-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; CHECK-NOLSE-O1-NEXT:    mov w0, w8
 ; CHECK-NOLSE-O1-NEXT:    ret
@@ -229,30 +329,30 @@ define i32 @fetch_and_nand(i32* %p) #0 {
 ; CHECK-NOLSE-O0-NEXT:    str x0, [sp, #16] ; 8-byte Folded Spill
 ; CHECK-NOLSE-O0-NEXT:    ldr w8, [x0]
 ; CHECK-NOLSE-O0-NEXT:    str w8, [sp, #28] ; 4-byte Folded Spill
-; CHECK-NOLSE-O0-NEXT:  LBB4_1: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:  LBB6_1: ; %atomicrmw.start
 ; CHECK-NOLSE-O0-NEXT:    ; =>This Loop Header: Depth=1
-; CHECK-NOLSE-O0-NEXT:    ; Child Loop BB4_2 Depth 2
+; CHECK-NOLSE-O0-NEXT:    ; Child Loop BB6_2 Depth 2
 ; CHECK-NOLSE-O0-NEXT:    ldr w8, [sp, #28] ; 4-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    ldr x11, [sp, #16] ; 8-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    and w9, w8, #0x7
 ; CHECK-NOLSE-O0-NEXT:    mvn w12, w9
-; CHECK-NOLSE-O0-NEXT:  LBB4_2: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; Parent Loop BB4_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:  LBB6_2: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:    ; Parent Loop BB6_1 Depth=1
 ; CHECK-NOLSE-O0-NEXT:    ; => This Inner Loop Header: Depth=2
 ; CHECK-NOLSE-O0-NEXT:    ldaxr w9, [x11]
 ; CHECK-NOLSE-O0-NEXT:    cmp w9, w8
-; CHECK-NOLSE-O0-NEXT:    b.ne LBB4_4
+; CHECK-NOLSE-O0-NEXT:    b.ne LBB6_4
 ; CHECK-NOLSE-O0-NEXT:  ; %bb.3: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB4_2 Depth=2
+; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB6_2 Depth=2
 ; CHECK-NOLSE-O0-NEXT:    stlxr w10, w12, [x11]
-; CHECK-NOLSE-O0-NEXT:    cbnz w10, LBB4_2
-; CHECK-NOLSE-O0-NEXT:  LBB4_4: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB4_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:    cbnz w10, LBB6_2
+; CHECK-NOLSE-O0-NEXT:  LBB6_4: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB6_1 Depth=1
 ; CHECK-NOLSE-O0-NEXT:    str w9, [sp, #12] ; 4-byte Folded Spill
 ; CHECK-NOLSE-O0-NEXT:    subs w8, w9, w8
 ; CHECK-NOLSE-O0-NEXT:    cset w8, eq
 ; CHECK-NOLSE-O0-NEXT:    str w9, [sp, #28] ; 4-byte Folded Spill
-; CHECK-NOLSE-O0-NEXT:    tbz w8, #0, LBB4_1
+; CHECK-NOLSE-O0-NEXT:    tbz w8, #0, LBB6_1
 ; CHECK-NOLSE-O0-NEXT:  ; %bb.5: ; %atomicrmw.end
 ; CHECK-NOLSE-O0-NEXT:    ldr w0, [sp, #12] ; 4-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    add sp, sp, #32 ; =32
@@ -260,13 +360,13 @@ define i32 @fetch_and_nand(i32* %p) #0 {
 ;
 ; CHECK-LSE-O1-LABEL: fetch_and_nand:
 ; CHECK-LSE-O1:       ; %bb.0:
-; CHECK-LSE-O1-NEXT:  LBB4_1: ; %atomicrmw.start
+; CHECK-LSE-O1-NEXT:  LBB6_1: ; %atomicrmw.start
 ; CHECK-LSE-O1-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; CHECK-LSE-O1-NEXT:    ldxr w8, [x0]
 ; CHECK-LSE-O1-NEXT:    and w9, w8, #0x7
 ; CHECK-LSE-O1-NEXT:    mvn w9, w9
 ; CHECK-LSE-O1-NEXT:    stlxr w10, w9, [x0]
-; CHECK-LSE-O1-NEXT:    cbnz w10, LBB4_1
+; CHECK-LSE-O1-NEXT:    cbnz w10, LBB6_1
 ; CHECK-LSE-O1-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; CHECK-LSE-O1-NEXT:    mov x0, x8
 ; CHECK-LSE-O1-NEXT:    ret
@@ -277,7 +377,7 @@ define i32 @fetch_and_nand(i32* %p) #0 {
 ; CHECK-LSE-O0-NEXT:    str x0, [sp, #16] ; 8-byte Folded Spill
 ; CHECK-LSE-O0-NEXT:    ldr w8, [x0]
 ; CHECK-LSE-O0-NEXT:    str w8, [sp, #28] ; 4-byte Folded Spill
-; CHECK-LSE-O0-NEXT:  LBB4_1: ; %atomicrmw.start
+; CHECK-LSE-O0-NEXT:  LBB6_1: ; %atomicrmw.start
 ; CHECK-LSE-O0-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; CHECK-LSE-O0-NEXT:    ldr w8, [sp, #28] ; 4-byte Folded Reload
 ; CHECK-LSE-O0-NEXT:    ldr x11, [sp, #16] ; 8-byte Folded Reload
@@ -289,7 +389,7 @@ define i32 @fetch_and_nand(i32* %p) #0 {
 ; CHECK-LSE-O0-NEXT:    subs w8, w9, w8
 ; CHECK-LSE-O0-NEXT:    cset w8, eq
 ; CHECK-LSE-O0-NEXT:    str w9, [sp, #28] ; 4-byte Folded Spill
-; CHECK-LSE-O0-NEXT:    tbz w8, #0, LBB4_1
+; CHECK-LSE-O0-NEXT:    tbz w8, #0, LBB6_1
 ; CHECK-LSE-O0-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; CHECK-LSE-O0-NEXT:    ldr w0, [sp, #12] ; 4-byte Folded Reload
 ; CHECK-LSE-O0-NEXT:    add sp, sp, #32 ; =32
@@ -301,13 +401,13 @@ define i32 @fetch_and_nand(i32* %p) #0 {
 define i64 @fetch_and_nand_64(i64* %p) #0 {
 ; CHECK-NOLSE-O1-LABEL: fetch_and_nand_64:
 ; CHECK-NOLSE-O1:       ; %bb.0:
-; CHECK-NOLSE-O1-NEXT:  LBB5_1: ; %atomicrmw.start
+; CHECK-NOLSE-O1-NEXT:  LBB7_1: ; %atomicrmw.start
 ; CHECK-NOLSE-O1-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; CHECK-NOLSE-O1-NEXT:    ldaxr x8, [x0]
 ; CHECK-NOLSE-O1-NEXT:    and x9, x8, #0x7
 ; CHECK-NOLSE-O1-NEXT:    mvn x9, x9
 ; CHECK-NOLSE-O1-NEXT:    stlxr w10, x9, [x0]
-; CHECK-NOLSE-O1-NEXT:    cbnz w10, LBB5_1
+; CHECK-NOLSE-O1-NEXT:    cbnz w10, LBB7_1
 ; CHECK-NOLSE-O1-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; CHECK-NOLSE-O1-NEXT:    mov x0, x8
 ; CHECK-NOLSE-O1-NEXT:    ret
@@ -318,30 +418,30 @@ define i64 @fetch_and_nand_64(i64* %p) #0 {
 ; CHECK-NOLSE-O0-NEXT:    str x0, [sp, #16] ; 8-byte Folded Spill
 ; CHECK-NOLSE-O0-NEXT:    ldr x8, [x0]
 ; CHECK-NOLSE-O0-NEXT:    str x8, [sp, #24] ; 8-byte Folded Spill
-; CHECK-NOLSE-O0-NEXT:  LBB5_1: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:  LBB7_1: ; %atomicrmw.start
 ; CHECK-NOLSE-O0-NEXT:    ; =>This Loop Header: Depth=1
-; CHECK-NOLSE-O0-NEXT:    ; Child Loop BB5_2 Depth 2
+; CHECK-NOLSE-O0-NEXT:    ; Child Loop BB7_2 Depth 2
 ; CHECK-NOLSE-O0-NEXT:    ldr x8, [sp, #24] ; 8-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    ldr x11, [sp, #16] ; 8-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    and x9, x8, #0x7
 ; CHECK-NOLSE-O0-NEXT:    mvn x12, x9
-; CHECK-NOLSE-O0-NEXT:  LBB5_2: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; Parent Loop BB5_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:  LBB7_2: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:    ; Parent Loop BB7_1 Depth=1
 ; CHECK-NOLSE-O0-NEXT:    ; => This Inner Loop Header: Depth=2
 ; CHECK-NOLSE-O0-NEXT:    ldaxr x9, [x11]
 ; CHECK-NOLSE-O0-NEXT:    cmp x9, x8
-; CHECK-NOLSE-O0-NEXT:    b.ne LBB5_4
+; CHECK-NOLSE-O0-NEXT:    b.ne LBB7_4
 ; CHECK-NOLSE-O0-NEXT:  ; %bb.3: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB5_2 Depth=2
+; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB7_2 Depth=2
 ; CHECK-NOLSE-O0-NEXT:    stlxr w10, x12, [x11]
-; CHECK-NOLSE-O0-NEXT:    cbnz w10, LBB5_2
-; CHECK-NOLSE-O0-NEXT:  LBB5_4: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB5_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:    cbnz w10, LBB7_2
+; CHECK-NOLSE-O0-NEXT:  LBB7_4: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB7_1 Depth=1
 ; CHECK-NOLSE-O0-NEXT:    str x9, [sp, #8] ; 8-byte Folded Spill
 ; CHECK-NOLSE-O0-NEXT:    subs x8, x9, x8
 ; CHECK-NOLSE-O0-NEXT:    cset w8, eq
 ; CHECK-NOLSE-O0-NEXT:    str x9, [sp, #24] ; 8-byte Folded Spill
-; CHECK-NOLSE-O0-NEXT:    tbz w8, #0, LBB5_1
+; CHECK-NOLSE-O0-NEXT:    tbz w8, #0, LBB7_1
 ; CHECK-NOLSE-O0-NEXT:  ; %bb.5: ; %atomicrmw.end
 ; CHECK-NOLSE-O0-NEXT:    ldr x0, [sp, #8] ; 8-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    add sp, sp, #32 ; =32
@@ -349,13 +449,13 @@ define i64 @fetch_and_nand_64(i64* %p) #0 {
 ;
 ; CHECK-LSE-O1-LABEL: fetch_and_nand_64:
 ; CHECK-LSE-O1:       ; %bb.0:
-; CHECK-LSE-O1-NEXT:  LBB5_1: ; %atomicrmw.start
+; CHECK-LSE-O1-NEXT:  LBB7_1: ; %atomicrmw.start
 ; CHECK-LSE-O1-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; CHECK-LSE-O1-NEXT:    ldaxr x8, [x0]
 ; CHECK-LSE-O1-NEXT:    and x9, x8, #0x7
 ; CHECK-LSE-O1-NEXT:    mvn x9, x9
 ; CHECK-LSE-O1-NEXT:    stlxr w10, x9, [x0]
-; CHECK-LSE-O1-NEXT:    cbnz w10, LBB5_1
+; CHECK-LSE-O1-NEXT:    cbnz w10, LBB7_1
 ; CHECK-LSE-O1-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; CHECK-LSE-O1-NEXT:    mov x0, x8
 ; CHECK-LSE-O1-NEXT:    ret
@@ -366,7 +466,7 @@ define i64 @fetch_and_nand_64(i64* %p) #0 {
 ; CHECK-LSE-O0-NEXT:    str x0, [sp, #16] ; 8-byte Folded Spill
 ; CHECK-LSE-O0-NEXT:    ldr x8, [x0]
 ; CHECK-LSE-O0-NEXT:    str x8, [sp, #24] ; 8-byte Folded Spill
-; CHECK-LSE-O0-NEXT:  LBB5_1: ; %atomicrmw.start
+; CHECK-LSE-O0-NEXT:  LBB7_1: ; %atomicrmw.start
 ; CHECK-LSE-O0-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; CHECK-LSE-O0-NEXT:    ldr x8, [sp, #24] ; 8-byte Folded Reload
 ; CHECK-LSE-O0-NEXT:    ldr x11, [sp, #16] ; 8-byte Folded Reload
@@ -378,7 +478,7 @@ define i64 @fetch_and_nand_64(i64* %p) #0 {
 ; CHECK-LSE-O0-NEXT:    subs x8, x9, x8
 ; CHECK-LSE-O0-NEXT:    cset w8, eq
 ; CHECK-LSE-O0-NEXT:    str x9, [sp, #24] ; 8-byte Folded Spill
-; CHECK-LSE-O0-NEXT:    tbz w8, #0, LBB5_1
+; CHECK-LSE-O0-NEXT:    tbz w8, #0, LBB7_1
 ; CHECK-LSE-O0-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; CHECK-LSE-O0-NEXT:    ldr x0, [sp, #8] ; 8-byte Folded Reload
 ; CHECK-LSE-O0-NEXT:    add sp, sp, #32 ; =32
@@ -391,12 +491,12 @@ define i32 @fetch_and_or(i32* %p) #0 {
 ; CHECK-NOLSE-O1-LABEL: fetch_and_or:
 ; CHECK-NOLSE-O1:       ; %bb.0:
 ; CHECK-NOLSE-O1-NEXT:    mov w9, #5
-; CHECK-NOLSE-O1-NEXT:  LBB6_1: ; %atomicrmw.start
+; CHECK-NOLSE-O1-NEXT:  LBB8_1: ; %atomicrmw.start
 ; CHECK-NOLSE-O1-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; CHECK-NOLSE-O1-NEXT:    ldaxr w8, [x0]
 ; CHECK-NOLSE-O1-NEXT:    orr w10, w8, w9
 ; CHECK-NOLSE-O1-NEXT:    stlxr w11, w10, [x0]
-; CHECK-NOLSE-O1-NEXT:    cbnz w11, LBB6_1
+; CHECK-NOLSE-O1-NEXT:    cbnz w11, LBB8_1
 ; CHECK-NOLSE-O1-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; CHECK-NOLSE-O1-NEXT:    mov w0, w8
 ; CHECK-NOLSE-O1-NEXT:    ret
@@ -407,30 +507,30 @@ define i32 @fetch_and_or(i32* %p) #0 {
 ; CHECK-NOLSE-O0-NEXT:    str x0, [sp, #16] ; 8-byte Folded Spill
 ; CHECK-NOLSE-O0-NEXT:    ldr w8, [x0]
 ; CHECK-NOLSE-O0-NEXT:    str w8, [sp, #28] ; 4-byte Folded Spill
-; CHECK-NOLSE-O0-NEXT:  LBB6_1: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:  LBB8_1: ; %atomicrmw.start
 ; CHECK-NOLSE-O0-NEXT:    ; =>This Loop Header: Depth=1
-; CHECK-NOLSE-O0-NEXT:    ; Child Loop BB6_2 Depth 2
+; CHECK-NOLSE-O0-NEXT:    ; Child Loop BB8_2 Depth 2
 ; CHECK-NOLSE-O0-NEXT:    ldr w8, [sp, #28] ; 4-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    ldr x11, [sp, #16] ; 8-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    mov w9, #5
 ; CHECK-NOLSE-O0-NEXT:    orr w12, w8, w9
-; CHECK-NOLSE-O0-NEXT:  LBB6_2: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; Parent Loop BB6_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:  LBB8_2: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:    ; Parent Loop BB8_1 Depth=1
 ; CHECK-NOLSE-O0-NEXT:    ; => This Inner Loop Header: Depth=2
 ; CHECK-NOLSE-O0-NEXT:    ldaxr w9, [x11]
 ; CHECK-NOLSE-O0-NEXT:    cmp w9, w8
-; CHECK-NOLSE-O0-NEXT:    b.ne LBB6_4
+; CHECK-NOLSE-O0-NEXT:    b.ne LBB8_4
 ; CHECK-NOLSE-O0-NEXT:  ; %bb.3: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB6_2 Depth=2
+; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB8_2 Depth=2
 ; CHECK-NOLSE-O0-NEXT:    stlxr w10, w12, [x11]
-; CHECK-NOLSE-O0-NEXT:    cbnz w10, LBB6_2
-; CHECK-NOLSE-O0-NEXT:  LBB6_4: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB6_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:    cbnz w10, LBB8_2
+; CHECK-NOLSE-O0-NEXT:  LBB8_4: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB8_1 Depth=1
 ; CHECK-NOLSE-O0-NEXT:    str w9, [sp, #12] ; 4-byte Folded Spill
 ; CHECK-NOLSE-O0-NEXT:    subs w8, w9, w8
 ; CHECK-NOLSE-O0-NEXT:    cset w8, eq
 ; CHECK-NOLSE-O0-NEXT:    str w9, [sp, #28] ; 4-byte Folded Spill
-; CHECK-NOLSE-O0-NEXT:    tbz w8, #0, LBB6_1
+; CHECK-NOLSE-O0-NEXT:    tbz w8, #0, LBB8_1
 ; CHECK-NOLSE-O0-NEXT:  ; %bb.5: ; %atomicrmw.end
 ; CHECK-NOLSE-O0-NEXT:    ldr w0, [sp, #12] ; 4-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    add sp, sp, #32 ; =32
@@ -454,12 +554,12 @@ define i32 @fetch_and_or(i32* %p) #0 {
 define i64 @fetch_and_or_64(i64* %p) #0 {
 ; CHECK-NOLSE-O1-LABEL: fetch_and_or_64:
 ; CHECK-NOLSE-O1:       ; %bb.0:
-; CHECK-NOLSE-O1-NEXT:  LBB7_1: ; %atomicrmw.start
+; CHECK-NOLSE-O1-NEXT:  LBB9_1: ; %atomicrmw.start
 ; CHECK-NOLSE-O1-NEXT:    ; =>This Inner Loop Header: Depth=1
 ; CHECK-NOLSE-O1-NEXT:    ldxr x8, [x0]
 ; CHECK-NOLSE-O1-NEXT:    orr x9, x8, #0x7
 ; CHECK-NOLSE-O1-NEXT:    stxr w10, x9, [x0]
-; CHECK-NOLSE-O1-NEXT:    cbnz w10, LBB7_1
+; CHECK-NOLSE-O1-NEXT:    cbnz w10, LBB9_1
 ; CHECK-NOLSE-O1-NEXT:  ; %bb.2: ; %atomicrmw.end
 ; CHECK-NOLSE-O1-NEXT:    mov x0, x8
 ; CHECK-NOLSE-O1-NEXT:    ret
@@ -470,29 +570,29 @@ define i64 @fetch_and_or_64(i64* %p) #0 {
 ; CHECK-NOLSE-O0-NEXT:    str x0, [sp, #16] ; 8-byte Folded Spill
 ; CHECK-NOLSE-O0-NEXT:    ldr x8, [x0]
 ; CHECK-NOLSE-O0-NEXT:    str x8, [sp, #24] ; 8-byte Folded Spill
-; CHECK-NOLSE-O0-NEXT:  LBB7_1: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:  LBB9_1: ; %atomicrmw.start
 ; CHECK-NOLSE-O0-NEXT:    ; =>This Loop Header: Depth=1
-; CHECK-NOLSE-O0-NEXT:    ; Child Loop BB7_2 Depth 2
+; CHECK-NOLSE-O0-NEXT:    ; Child Loop BB9_2 Depth 2
 ; CHECK-NOLSE-O0-NEXT:    ldr x8, [sp, #24] ; 8-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    ldr x11, [sp, #16] ; 8-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    orr x12, x8, #0x7
-; CHECK-NOLSE-O0-NEXT:  LBB7_2: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; Parent Loop BB7_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:  LBB9_2: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:    ; Parent Loop BB9_1 Depth=1
 ; CHECK-NOLSE-O0-NEXT:    ; => This Inner Loop Header: Depth=2
 ; CHECK-NOLSE-O0-NEXT:    ldaxr x9, [x11]
 ; CHECK-NOLSE-O0-NEXT:    cmp x9, x8
-; CHECK-NOLSE-O0-NEXT:    b.ne LBB7_4
+; CHECK-NOLSE-O0-NEXT:    b.ne LBB9_4
 ; CHECK-NOLSE-O0-NEXT:  ; %bb.3: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB7_2 Depth=2
+; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB9_2 Depth=2
 ; CHECK-NOLSE-O0-NEXT:    stlxr w10, x12, [x11]
-; CHECK-NOLSE-O0-NEXT:    cbnz w10, LBB7_2
-; CHECK-NOLSE-O0-NEXT:  LBB7_4: ; %atomicrmw.start
-; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB7_1 Depth=1
+; CHECK-NOLSE-O0-NEXT:    cbnz w10, LBB9_2
+; CHECK-NOLSE-O0-NEXT:  LBB9_4: ; %atomicrmw.start
+; CHECK-NOLSE-O0-NEXT:    ; in Loop: Header=BB9_1 Depth=1
 ; CHECK-NOLSE-O0-NEXT:    str x9, [sp, #8] ; 8-byte Folded Spill
 ; CHECK-NOLSE-O0-NEXT:    subs x8, x9, x8
 ; CHECK-NOLSE-O0-NEXT:    cset w8, eq
 ; CHECK-NOLSE-O0-NEXT:    str x9, [sp, #24] ; 8-byte Folded Spill
-; CHECK-NOLSE-O0-NEXT:    tbz w8, #0, LBB7_1
+; CHECK-NOLSE-O0-NEXT:    tbz w8, #0, LBB9_1
 ; CHECK-NOLSE-O0-NEXT:  ; %bb.5: ; %atomicrmw.end
 ; CHECK-NOLSE-O0-NEXT:    ldr x0, [sp, #8] ; 8-byte Folded Reload
 ; CHECK-NOLSE-O0-NEXT:    add sp, sp, #32 ; =32

diff  --git a/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll b/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
index 7e627bd23374c..811f2a8553d7f 100644
--- a/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
+++ b/llvm/test/CodeGen/AArch64/atomic-ops-lse.ll
@@ -394,14 +394,14 @@ define dso_local i8 @test_atomic_load_min_i8(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB18_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB18_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -422,14 +422,14 @@ define dso_local i16 @test_atomic_load_min_i16(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB19_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB19_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -450,13 +450,13 @@ define dso_local i32 @test_atomic_load_min_i32(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB20_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB20_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -477,13 +477,13 @@ define dso_local i64 @test_atomic_load_min_i64(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB21_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB21_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -504,13 +504,13 @@ define dso_local void @test_atomic_load_min_i32_noret(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB22_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB22_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i32* @var32, i32 %offset seq_cst
@@ -529,13 +529,13 @@ define dso_local void @test_atomic_load_min_i64_noret(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB23_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB23_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i64* @var64, i64 %offset seq_cst
@@ -554,13 +554,13 @@ define dso_local i8 @test_atomic_load_umin_i8(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB24_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB24_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -581,13 +581,13 @@ define dso_local i16 @test_atomic_load_umin_i16(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB25_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB25_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -608,13 +608,13 @@ define dso_local i32 @test_atomic_load_umin_i32(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB26_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB26_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -635,13 +635,13 @@ define dso_local i64 @test_atomic_load_umin_i64(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB27_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB27_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -662,13 +662,13 @@ define dso_local void @test_atomic_load_umin_i32_noret(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB28_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB28_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i32* @var32, i32 %offset seq_cst
@@ -687,13 +687,13 @@ define dso_local void @test_atomic_load_umin_i64_noret(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB29_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB29_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i64* @var64, i64 %offset seq_cst
@@ -712,14 +712,14 @@ define dso_local i8 @test_atomic_load_max_i8(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB30_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB30_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -740,14 +740,14 @@ define dso_local i16 @test_atomic_load_max_i16(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB31_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB31_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -768,13 +768,13 @@ define dso_local i32 @test_atomic_load_max_i32(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB32_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB32_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -795,13 +795,13 @@ define dso_local i64 @test_atomic_load_max_i64(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB33_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB33_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -822,13 +822,13 @@ define dso_local void @test_atomic_load_max_i32_noret(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB34_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB34_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i32* @var32, i32 %offset seq_cst
@@ -847,13 +847,13 @@ define dso_local void @test_atomic_load_max_i64_noret(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB35_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB35_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i64* @var64, i64 %offset seq_cst
@@ -872,13 +872,13 @@ define dso_local i8 @test_atomic_load_umax_i8(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB36_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB36_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -899,13 +899,13 @@ define dso_local i16 @test_atomic_load_umax_i16(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB37_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB37_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -926,13 +926,13 @@ define dso_local i32 @test_atomic_load_umax_i32(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB38_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB38_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -953,13 +953,13 @@ define dso_local i64 @test_atomic_load_umax_i64(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB39_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB39_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -980,13 +980,13 @@ define dso_local void @test_atomic_load_umax_i32_noret(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB40_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB40_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i32* @var32, i32 %offset seq_cst
@@ -1005,13 +1005,13 @@ define dso_local void @test_atomic_load_umax_i64_noret(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB41_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB41_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i64* @var64, i64 %offset seq_cst
@@ -1272,6 +1272,29 @@ define dso_local i32 @test_atomic_cmpxchg_i32(i32 %wanted, i32 %new) nounwind {
    ret i32 %old
 }
 
+define dso_local i32 @test_atomic_cmpxchg_i32_monotonic_acquire(i32 %wanted, i32 %new) nounwind {
+; CHECK-LABEL: test_atomic_cmpxchg_i32_monotonic_acquire:
+; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic_acquire:
+; OUTLINE-ATOMICS:       // %bb.0:
+; OUTLINE-ATOMICS-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT:    adrp x2, var32
+; OUTLINE-ATOMICS-NEXT:    add x2, x2, :lo12:var32
+; OUTLINE-ATOMICS-NEXT:    bl __aarch64_cas4_acq
+; OUTLINE-ATOMICS-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; OUTLINE-ATOMICS-NEXT:    ret
+   %pair = cmpxchg i32* @var32, i32 %wanted, i32 %new monotonic acquire
+   %old = extractvalue { i32, i1 } %pair, 0
+
+; CHECK-NOT: dmb
+; CHECK: adrp [[TMPADDR:x[0-9]+]], var32
+; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32
+
+; CHECK: casa w0, w1, [x[[ADDR]]]
+; CHECK-NOT: dmb
+
+   ret i32 %old
+}
+
 define dso_local i64 @test_atomic_cmpxchg_i64(i64 %wanted, i64 %new) nounwind {
 ; CHECK-LABEL: test_atomic_cmpxchg_i64:
 ; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64:
@@ -1318,6 +1341,52 @@ define dso_local i128 @test_atomic_cmpxchg_i128(i128 %wanted, i128 %new) nounwin
    ret i128 %old
 }
 
+define dso_local i128 @test_atomic_cmpxchg_i128_monotonic_seqcst(i128 %wanted, i128 %new) nounwind {
+; CHECK-LABEL: test_atomic_cmpxchg_i128_monotonic_seqcst:
+; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_monotonic_seqcst:
+; OUTLINE-ATOMICS:       // %bb.0:
+; OUTLINE-ATOMICS-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT:    adrp x4, var128
+; OUTLINE-ATOMICS-NEXT:    add x4, x4, :lo12:var128
+; OUTLINE-ATOMICS-NEXT:    bl __aarch64_cas16_acq_rel
+; OUTLINE-ATOMICS-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; OUTLINE-ATOMICS-NEXT:    ret
+   %pair = cmpxchg i128* @var128, i128 %wanted, i128 %new monotonic seq_cst
+   %old = extractvalue { i128, i1 } %pair, 0
+
+; CHECK-NOT: dmb
+; CHECK: adrp [[TMPADDR:x[0-9]+]], var128
+; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var128
+
+; CHECK: caspal x0, x1, x2, x3, [x[[ADDR]]]
+; CHECK-NOT: dmb
+
+   ret i128 %old
+}
+
+define dso_local i128 @test_atomic_cmpxchg_i128_release_acquire(i128 %wanted, i128 %new) nounwind {
+; CHECK-LABEL: test_atomic_cmpxchg_i128_release_acquire:
+; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i128_release_acquire:
+; OUTLINE-ATOMICS:       // %bb.0:
+; OUTLINE-ATOMICS-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT:    adrp x4, var128
+; OUTLINE-ATOMICS-NEXT:    add x4, x4, :lo12:var128
+; OUTLINE-ATOMICS-NEXT:    bl __aarch64_cas16_acq_rel
+; OUTLINE-ATOMICS-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; OUTLINE-ATOMICS-NEXT:    ret
+   %pair = cmpxchg i128* @var128, i128 %wanted, i128 %new release acquire
+   %old = extractvalue { i128, i1 } %pair, 0
+
+; CHECK-NOT: dmb
+; CHECK: adrp [[TMPADDR:x[0-9]+]], var128
+; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var128
+
+; CHECK: caspal x0, x1, x2, x3, [x[[ADDR]]]
+; CHECK-NOT: dmb
+
+   ret i128 %old
+}
+
 define dso_local i8 @test_atomic_load_sub_i8(i8 %offset) nounwind {
 ; CHECK-LABEL: test_atomic_load_sub_i8:
 ; OUTLINE-ATOMICS-LABEL: test_atomic_load_sub_i8:
@@ -3511,6 +3580,52 @@ define dso_local i32 @test_atomic_cmpxchg_i32_seq_cst(i32 %wanted, i32 %new) nou
    ret i32 %old
 }
 
+define dso_local i32 @test_atomic_cmpxchg_i32_monotonic_seq_cst(i32 %wanted, i32 %new) nounwind {
+; CHECK-LABEL: test_atomic_cmpxchg_i32_monotonic_seq_cst:
+; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_monotonic_seq_cst:
+; OUTLINE-ATOMICS:       // %bb.0:
+; OUTLINE-ATOMICS-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT:    adrp x2, var32
+; OUTLINE-ATOMICS-NEXT:    add x2, x2, :lo12:var32
+; OUTLINE-ATOMICS-NEXT:    bl __aarch64_cas4_acq_rel
+; OUTLINE-ATOMICS-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; OUTLINE-ATOMICS-NEXT:    ret
+   %pair = cmpxchg i32* @var32, i32 %wanted, i32 %new monotonic seq_cst
+   %old = extractvalue { i32, i1 } %pair, 0
+
+; CHECK-NOT: dmb
+; CHECK: adrp [[TMPADDR:x[0-9]+]], var32
+; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32
+
+; CHECK: casal w0, w1, [x[[ADDR]]]
+; CHECK-NOT: dmb
+
+   ret i32 %old
+}
+
+define dso_local i32 @test_atomic_cmpxchg_i32_release_acquire(i32 %wanted, i32 %new) nounwind {
+; CHECK-LABEL: test_atomic_cmpxchg_i32_release_acquire:
+; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i32_release_acquire:
+; OUTLINE-ATOMICS:       // %bb.0:
+; OUTLINE-ATOMICS-NEXT:    str x30, [sp, #-16]! // 8-byte Folded Spill
+; OUTLINE-ATOMICS-NEXT:    adrp x2, var32
+; OUTLINE-ATOMICS-NEXT:    add x2, x2, :lo12:var32
+; OUTLINE-ATOMICS-NEXT:    bl __aarch64_cas4_acq_rel
+; OUTLINE-ATOMICS-NEXT:    ldr x30, [sp], #16 // 8-byte Folded Reload
+; OUTLINE-ATOMICS-NEXT:    ret
+   %pair = cmpxchg i32* @var32, i32 %wanted, i32 %new release acquire
+   %old = extractvalue { i32, i1 } %pair, 0
+
+; CHECK-NOT: dmb
+; CHECK: adrp [[TMPADDR:x[0-9]+]], var32
+; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], {{#?}}:lo12:var32
+
+; CHECK: casal w0, w1, [x[[ADDR]]]
+; CHECK-NOT: dmb
+
+   ret i32 %old
+}
+
 define dso_local i64 @test_atomic_cmpxchg_i64_seq_cst(i64 %wanted, i64 %new) nounwind {
 ; CHECK-LABEL: test_atomic_cmpxchg_i64_seq_cst:
 ; OUTLINE-ATOMICS-LABEL: test_atomic_cmpxchg_i64_seq_cst:
@@ -3563,14 +3678,14 @@ define dso_local i8 @test_atomic_load_max_i8_acq_rel(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB158_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB158_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3591,14 +3706,14 @@ define dso_local i16 @test_atomic_load_max_i16_acq_rel(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB159_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB159_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3619,13 +3734,13 @@ define dso_local i32 @test_atomic_load_max_i32_acq_rel(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB160_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB160_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3646,13 +3761,13 @@ define dso_local i64 @test_atomic_load_max_i64_acq_rel(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB161_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB161_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3673,13 +3788,13 @@ define dso_local void @test_atomic_load_max_i32_noret_acq_rel(i32 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB162_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB162_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i32* @var32, i32 %offset acq_rel
@@ -3698,13 +3813,13 @@ define dso_local void @test_atomic_load_max_i64_noret_acq_rel(i64 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB163_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB163_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i64* @var64, i64 %offset acq_rel
@@ -3723,14 +3838,14 @@ define dso_local i8 @test_atomic_load_max_i8_acquire(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB164_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB164_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3751,14 +3866,14 @@ define dso_local i16 @test_atomic_load_max_i16_acquire(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB165_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB165_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3779,13 +3894,13 @@ define dso_local i32 @test_atomic_load_max_i32_acquire(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB166_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB166_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3806,13 +3921,13 @@ define dso_local i64 @test_atomic_load_max_i64_acquire(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB167_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB167_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3833,13 +3948,13 @@ define dso_local void @test_atomic_load_max_i32_noret_acquire(i32 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB168_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB168_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i32* @var32, i32 %offset acquire
@@ -3858,13 +3973,13 @@ define dso_local void @test_atomic_load_max_i64_noret_acquire(i64 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB169_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB169_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i64* @var64, i64 %offset acquire
@@ -3883,14 +3998,14 @@ define dso_local i8 @test_atomic_load_max_i8_monotonic(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB170_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB170_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3911,14 +4026,14 @@ define dso_local i16 @test_atomic_load_max_i16_monotonic(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB171_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB171_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3939,13 +4054,13 @@ define dso_local i32 @test_atomic_load_max_i32_monotonic(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB172_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB172_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3966,13 +4081,13 @@ define dso_local i64 @test_atomic_load_max_i64_monotonic(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB173_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB173_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -3993,13 +4108,13 @@ define dso_local void @test_atomic_load_max_i32_noret_monotonic(i32 %offset) nou
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB174_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB174_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i32* @var32, i32 %offset monotonic
@@ -4018,13 +4133,13 @@ define dso_local void @test_atomic_load_max_i64_noret_monotonic(i64 %offset) nou
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB175_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB175_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i64* @var64, i64 %offset monotonic
@@ -4043,14 +4158,14 @@ define dso_local i8 @test_atomic_load_max_i8_release(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB176_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB176_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4071,14 +4186,14 @@ define dso_local i16 @test_atomic_load_max_i16_release(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB177_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB177_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4099,13 +4214,13 @@ define dso_local i32 @test_atomic_load_max_i32_release(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB178_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB178_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4126,13 +4241,13 @@ define dso_local i64 @test_atomic_load_max_i64_release(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB179_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB179_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4153,13 +4268,13 @@ define dso_local void @test_atomic_load_max_i32_noret_release(i32 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB180_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB180_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i32* @var32, i32 %offset release
@@ -4178,13 +4293,13 @@ define dso_local void @test_atomic_load_max_i64_noret_release(i64 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB181_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB181_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i64* @var64, i64 %offset release
@@ -4203,14 +4318,14 @@ define dso_local i8 @test_atomic_load_max_i8_seq_cst(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB182_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB182_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4231,14 +4346,14 @@ define dso_local i16 @test_atomic_load_max_i16_seq_cst(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB183_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB183_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4259,13 +4374,13 @@ define dso_local i32 @test_atomic_load_max_i32_seq_cst(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB184_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB184_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4286,13 +4401,13 @@ define dso_local i64 @test_atomic_load_max_i64_seq_cst(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB185_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB185_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4313,13 +4428,13 @@ define dso_local void @test_atomic_load_max_i32_noret_seq_cst(i32 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB186_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB186_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i32* @var32, i32 %offset seq_cst
@@ -4338,13 +4453,13 @@ define dso_local void @test_atomic_load_max_i64_noret_seq_cst(i64 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB187_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, gt
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB187_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw max i64* @var64, i64 %offset seq_cst
@@ -4363,14 +4478,14 @@ define dso_local i8 @test_atomic_load_min_i8_acq_rel(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB188_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB188_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4391,14 +4506,14 @@ define dso_local i16 @test_atomic_load_min_i16_acq_rel(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB189_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB189_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4419,13 +4534,13 @@ define dso_local i32 @test_atomic_load_min_i32_acq_rel(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB190_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB190_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4446,13 +4561,13 @@ define dso_local i64 @test_atomic_load_min_i64_acq_rel(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB191_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB191_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4473,13 +4588,13 @@ define dso_local void @test_atomic_load_min_i32_noret_acq_rel(i32 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB192_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB192_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i32* @var32, i32 %offset acq_rel
@@ -4498,13 +4613,13 @@ define dso_local void @test_atomic_load_min_i64_noret_acq_rel(i64 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB193_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB193_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i64* @var64, i64 %offset acq_rel
@@ -4523,14 +4638,14 @@ define dso_local i8 @test_atomic_load_min_i8_acquire(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB194_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB194_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4551,14 +4666,14 @@ define dso_local i16 @test_atomic_load_min_i16_acquire(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB195_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB195_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4579,13 +4694,13 @@ define dso_local i32 @test_atomic_load_min_i32_acquire(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB196_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB196_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4606,13 +4721,13 @@ define dso_local i64 @test_atomic_load_min_i64_acquire(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB197_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB197_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4633,13 +4748,13 @@ define dso_local void @test_atomic_load_min_i32_noret_acquire(i32 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB198_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB198_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i32* @var32, i32 %offset acquire
@@ -4658,13 +4773,13 @@ define dso_local void @test_atomic_load_min_i64_noret_acquire(i64 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB199_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB199_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i64* @var64, i64 %offset acquire
@@ -4683,14 +4798,14 @@ define dso_local i8 @test_atomic_load_min_i8_monotonic(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB200_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB200_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4711,14 +4826,14 @@ define dso_local i16 @test_atomic_load_min_i16_monotonic(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB201_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB201_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4739,13 +4854,13 @@ define dso_local i32 @test_atomic_load_min_i32_monotonic(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB202_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB202_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4766,13 +4881,13 @@ define dso_local i64 @test_atomic_load_min_i64_monotonic(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB203_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB203_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4793,13 +4908,13 @@ define dso_local void @test_atomic_load_min_i32_noret_monotonic(i32 %offset) nou
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB204_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB204_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i32* @var32, i32 %offset monotonic
@@ -4818,13 +4933,13 @@ define dso_local void @test_atomic_load_min_i64_noret_monotonic(i64 %offset) nou
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB205_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB205_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i64* @var64, i64 %offset monotonic
@@ -4843,14 +4958,14 @@ define dso_local i8 @test_atomic_load_min_i8_release(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB206_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB206_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4871,14 +4986,14 @@ define dso_local i16 @test_atomic_load_min_i16_release(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB207_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB207_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4899,13 +5014,13 @@ define dso_local i32 @test_atomic_load_min_i32_release(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB208_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB208_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4926,13 +5041,13 @@ define dso_local i64 @test_atomic_load_min_i64_release(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB209_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB209_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -4953,13 +5068,13 @@ define dso_local void @test_atomic_load_min_i32_noret_release(i32 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB210_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB210_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i32* @var32, i32 %offset release
@@ -4978,13 +5093,13 @@ define dso_local void @test_atomic_load_min_i64_noret_release(i64 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB211_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB211_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i64* @var64, i64 %offset release
@@ -5003,14 +5118,14 @@ define dso_local i8 @test_atomic_load_min_i8_seq_cst(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB212_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxtb w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB212_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -5031,14 +5146,14 @@ define dso_local i16 @test_atomic_load_min_i16_seq_cst(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB213_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w10, [x9]
 ; OUTLINE-ATOMICS-NEXT:    sxth w8, w10
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, sxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w10, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB213_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -5059,13 +5174,13 @@ define dso_local i32 @test_atomic_load_min_i32_seq_cst(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB214_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB214_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -5086,13 +5201,13 @@ define dso_local i64 @test_atomic_load_min_i64_seq_cst(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB215_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB215_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -5113,13 +5228,13 @@ define dso_local void @test_atomic_load_min_i32_noret_seq_cst(i32 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB216_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB216_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i32* @var32, i32 %offset seq_cst
@@ -5138,13 +5253,13 @@ define dso_local void @test_atomic_load_min_i64_noret_seq_cst(i64 %offset) nounw
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB217_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, le
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB217_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw min i64* @var64, i64 %offset seq_cst
@@ -7103,13 +7218,13 @@ define dso_local i8 @test_atomic_load_umax_i8_acq_rel(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB308_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB308_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7130,13 +7245,13 @@ define dso_local i16 @test_atomic_load_umax_i16_acq_rel(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB309_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB309_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7157,13 +7272,13 @@ define dso_local i32 @test_atomic_load_umax_i32_acq_rel(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB310_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB310_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7184,13 +7299,13 @@ define dso_local i64 @test_atomic_load_umax_i64_acq_rel(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB311_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB311_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7211,13 +7326,13 @@ define dso_local void @test_atomic_load_umax_i32_noret_acq_rel(i32 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB312_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB312_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i32* @var32, i32 %offset acq_rel
@@ -7236,13 +7351,13 @@ define dso_local void @test_atomic_load_umax_i64_noret_acq_rel(i64 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB313_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB313_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i64* @var64, i64 %offset acq_rel
@@ -7261,13 +7376,13 @@ define dso_local i8 @test_atomic_load_umax_i8_acquire(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB314_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB314_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7288,13 +7403,13 @@ define dso_local i16 @test_atomic_load_umax_i16_acquire(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB315_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB315_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7315,13 +7430,13 @@ define dso_local i32 @test_atomic_load_umax_i32_acquire(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB316_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB316_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7342,13 +7457,13 @@ define dso_local i64 @test_atomic_load_umax_i64_acquire(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB317_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB317_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7369,13 +7484,13 @@ define dso_local void @test_atomic_load_umax_i32_noret_acquire(i32 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB318_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB318_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i32* @var32, i32 %offset acquire
@@ -7394,13 +7509,13 @@ define dso_local void @test_atomic_load_umax_i64_noret_acquire(i64 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB319_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB319_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i64* @var64, i64 %offset acquire
@@ -7419,13 +7534,13 @@ define dso_local i8 @test_atomic_load_umax_i8_monotonic(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB320_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB320_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7446,13 +7561,13 @@ define dso_local i16 @test_atomic_load_umax_i16_monotonic(i16 %offset) nounwind
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB321_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB321_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7473,13 +7588,13 @@ define dso_local i32 @test_atomic_load_umax_i32_monotonic(i32 %offset) nounwind
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB322_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB322_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7500,13 +7615,13 @@ define dso_local i64 @test_atomic_load_umax_i64_monotonic(i64 %offset) nounwind
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB323_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB323_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7527,13 +7642,13 @@ define dso_local void @test_atomic_load_umax_i32_noret_monotonic(i32 %offset) no
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB324_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB324_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i32* @var32, i32 %offset monotonic
@@ -7552,13 +7667,13 @@ define dso_local void @test_atomic_load_umax_i64_noret_monotonic(i64 %offset) no
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB325_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB325_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i64* @var64, i64 %offset monotonic
@@ -7577,13 +7692,13 @@ define dso_local i8 @test_atomic_load_umax_i8_release(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB326_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB326_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7604,13 +7719,13 @@ define dso_local i16 @test_atomic_load_umax_i16_release(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB327_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB327_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7631,13 +7746,13 @@ define dso_local i32 @test_atomic_load_umax_i32_release(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB328_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB328_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7658,13 +7773,13 @@ define dso_local i64 @test_atomic_load_umax_i64_release(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB329_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB329_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7685,13 +7800,13 @@ define dso_local void @test_atomic_load_umax_i32_noret_release(i32 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB330_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB330_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i32* @var32, i32 %offset release
@@ -7710,13 +7825,13 @@ define dso_local void @test_atomic_load_umax_i64_noret_release(i64 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB331_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB331_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i64* @var64, i64 %offset release
@@ -7735,13 +7850,13 @@ define dso_local i8 @test_atomic_load_umax_i8_seq_cst(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB332_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB332_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7762,13 +7877,13 @@ define dso_local i16 @test_atomic_load_umax_i16_seq_cst(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB333_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB333_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7789,13 +7904,13 @@ define dso_local i32 @test_atomic_load_umax_i32_seq_cst(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB334_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB334_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7816,13 +7931,13 @@ define dso_local i64 @test_atomic_load_umax_i64_seq_cst(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB335_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB335_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7843,13 +7958,13 @@ define dso_local void @test_atomic_load_umax_i32_noret_seq_cst(i32 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB336_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB336_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i32* @var32, i32 %offset seq_cst
@@ -7868,13 +7983,13 @@ define dso_local void @test_atomic_load_umax_i64_noret_seq_cst(i64 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB337_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, hi
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB337_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umax i64* @var64, i64 %offset seq_cst
@@ -7893,13 +8008,13 @@ define dso_local i8 @test_atomic_load_umin_i8_acq_rel(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB338_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB338_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7920,13 +8035,13 @@ define dso_local i16 @test_atomic_load_umin_i16_acq_rel(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB339_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB339_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7947,13 +8062,13 @@ define dso_local i32 @test_atomic_load_umin_i32_acq_rel(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB340_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB340_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -7974,13 +8089,13 @@ define dso_local i64 @test_atomic_load_umin_i64_acq_rel(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB341_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB341_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8001,13 +8116,13 @@ define dso_local void @test_atomic_load_umin_i32_noret_acq_rel(i32 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB342_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB342_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i32* @var32, i32 %offset acq_rel
@@ -8026,13 +8141,13 @@ define dso_local void @test_atomic_load_umin_i64_noret_acq_rel(i64 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB343_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB343_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i64* @var64, i64 %offset acq_rel
@@ -8051,13 +8166,13 @@ define dso_local i8 @test_atomic_load_umin_i8_acquire(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB344_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB344_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8078,13 +8193,13 @@ define dso_local i16 @test_atomic_load_umin_i16_acquire(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB345_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB345_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8105,13 +8220,13 @@ define dso_local i32 @test_atomic_load_umin_i32_acquire(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB346_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB346_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8132,13 +8247,13 @@ define dso_local i64 @test_atomic_load_umin_i64_acquire(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB347_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB347_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8159,13 +8274,13 @@ define dso_local void @test_atomic_load_umin_i32_noret_acquire(i32 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB348_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB348_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i32* @var32, i32 %offset acquire
@@ -8184,13 +8299,13 @@ define dso_local void @test_atomic_load_umin_i64_noret_acquire(i64 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB349_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB349_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i64* @var64, i64 %offset acquire
@@ -8209,13 +8324,13 @@ define dso_local i8 @test_atomic_load_umin_i8_monotonic(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB350_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB350_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8236,13 +8351,13 @@ define dso_local i16 @test_atomic_load_umin_i16_monotonic(i16 %offset) nounwind
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB351_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB351_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8263,13 +8378,13 @@ define dso_local i32 @test_atomic_load_umin_i32_monotonic(i32 %offset) nounwind
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB352_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB352_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8290,13 +8405,13 @@ define dso_local i64 @test_atomic_load_umin_i64_monotonic(i64 %offset) nounwind
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB353_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB353_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8317,13 +8432,13 @@ define dso_local void @test_atomic_load_umin_i32_noret_monotonic(i32 %offset) no
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB354_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB354_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i32* @var32, i32 %offset monotonic
@@ -8342,13 +8457,13 @@ define dso_local void @test_atomic_load_umin_i64_noret_monotonic(i64 %offset) no
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB355_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB355_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i64* @var64, i64 %offset monotonic
@@ -8367,13 +8482,13 @@ define dso_local i8 @test_atomic_load_umin_i8_release(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB356_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB356_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8394,13 +8509,13 @@ define dso_local i16 @test_atomic_load_umin_i16_release(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB357_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB357_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8421,13 +8536,13 @@ define dso_local i32 @test_atomic_load_umin_i32_release(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB358_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB358_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8448,13 +8563,13 @@ define dso_local i64 @test_atomic_load_umin_i64_release(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB359_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB359_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8475,13 +8590,13 @@ define dso_local void @test_atomic_load_umin_i32_noret_release(i32 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB360_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB360_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i32* @var32, i32 %offset release
@@ -8500,13 +8615,13 @@ define dso_local void @test_atomic_load_umin_i64_noret_release(i64 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB361_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB361_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i64* @var64, i64 %offset release
@@ -8525,13 +8640,13 @@ define dso_local i8 @test_atomic_load_umin_i8_seq_cst(i8 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var8
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var8
-; OUTLINE-ATOMICS-NEXT:  .LBB362_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrb w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxtb
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxrb w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB362_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8552,13 +8667,13 @@ define dso_local i16 @test_atomic_load_umin_i16_seq_cst(i16 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var16
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var16
-; OUTLINE-ATOMICS-NEXT:  .LBB363_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxrh w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0, uxth
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxrh w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB363_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8579,13 +8694,13 @@ define dso_local i32 @test_atomic_load_umin_i32_seq_cst(i32 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var32
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB364_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp w8, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w10, w8, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, w10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB364_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov w0, w8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8606,13 +8721,13 @@ define dso_local i64 @test_atomic_load_umin_i64_seq_cst(i64 %offset) nounwind {
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x9, var64
 ; OUTLINE-ATOMICS-NEXT:    add x9, x9, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB365_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x8, [x9]
 ; OUTLINE-ATOMICS-NEXT:    cmp x8, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x10, x8, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w11, x10, [x9]
-; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB365_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w11, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    mov x0, x8
 ; OUTLINE-ATOMICS-NEXT:    ret
@@ -8633,13 +8748,13 @@ define dso_local void @test_atomic_load_umin_i32_noret_seq_cst(i32 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var32
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var32
-; OUTLINE-ATOMICS-NEXT:  .LBB366_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr w9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp w9, w0
 ; OUTLINE-ATOMICS-NEXT:    csel w9, w9, w0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, w9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB366_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i32* @var32, i32 %offset seq_cst
@@ -8658,13 +8773,13 @@ define dso_local void @test_atomic_load_umin_i64_noret_seq_cst(i64 %offset) noun
 ; OUTLINE-ATOMICS:       // %bb.0:
 ; OUTLINE-ATOMICS-NEXT:    adrp x8, var64
 ; OUTLINE-ATOMICS-NEXT:    add x8, x8, :lo12:var64
-; OUTLINE-ATOMICS-NEXT:  .LBB367_1: // %atomicrmw.start
+; OUTLINE-ATOMICS-NEXT:  .LBB[[LOOPSTART:.*]]: // %atomicrmw.start
 ; OUTLINE-ATOMICS-NEXT:    // =>This Inner Loop Header: Depth=1
 ; OUTLINE-ATOMICS-NEXT:    ldaxr x9, [x8]
 ; OUTLINE-ATOMICS-NEXT:    cmp x9, x0
 ; OUTLINE-ATOMICS-NEXT:    csel x9, x9, x0, ls
 ; OUTLINE-ATOMICS-NEXT:    stlxr w10, x9, [x8]
-; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB367_1
+; OUTLINE-ATOMICS-NEXT:    cbnz w10, .LBB[[LOOPSTART]]
 ; OUTLINE-ATOMICS-NEXT:  // %bb.2: // %atomicrmw.end
 ; OUTLINE-ATOMICS-NEXT:    ret
    atomicrmw umin i64* @var64, i64 %offset seq_cst

diff  --git a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
index 58a93719603fa..746c7bf582270 100644
--- a/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+++ b/llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
@@ -1777,7 +1777,7 @@ define void @cmpxchg_i32_release_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind
 ; RV32IA-LABEL: cmpxchg_i32_release_acquire:
 ; RV32IA:       # %bb.0:
 ; RV32IA-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
-; RV32IA-NEXT:    lr.w a3, (a0)
+; RV32IA-NEXT:    lr.w.aq a3, (a0)
 ; RV32IA-NEXT:    bne a3, a1, .LBB24_3
 ; RV32IA-NEXT:  # %bb.2: # in Loop: Header=BB24_1 Depth=1
 ; RV32IA-NEXT:    sc.w.rl a4, a2, (a0)
@@ -1802,7 +1802,7 @@ define void @cmpxchg_i32_release_acquire(i32* %ptr, i32 %cmp, i32 %val) nounwind
 ; RV64IA:       # %bb.0:
 ; RV64IA-NEXT:    sext.w a1, a1
 ; RV64IA-NEXT:  .LBB24_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.w a3, (a0)
+; RV64IA-NEXT:    lr.w.aq a3, (a0)
 ; RV64IA-NEXT:    bne a3, a1, .LBB24_3
 ; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB24_1 Depth=1
 ; RV64IA-NEXT:    sc.w.rl a4, a2, (a0)
@@ -2375,7 +2375,7 @@ define void @cmpxchg_i64_release_acquire(i64* %ptr, i64 %cmp, i64 %val) nounwind
 ; RV64IA-LABEL: cmpxchg_i64_release_acquire:
 ; RV64IA:       # %bb.0:
 ; RV64IA-NEXT:  .LBB34_1: # =>This Inner Loop Header: Depth=1
-; RV64IA-NEXT:    lr.d a3, (a0)
+; RV64IA-NEXT:    lr.d.aq a3, (a0)
 ; RV64IA-NEXT:    bne a3, a1, .LBB34_3
 ; RV64IA-NEXT:  # %bb.2: # in Loop: Header=BB34_1 Depth=1
 ; RV64IA-NEXT:    sc.d.rl a4, a2, (a0)

diff  --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
index 6e8e832763e7c..14e248f2c248d 100644
--- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
+++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
@@ -1035,33 +1035,33 @@ std::string TreePredicateFn::getPredCode() const {
   }
 
   if (isAtomic() && isAtomicOrderingMonotonic())
-    Code += "if (cast<AtomicSDNode>(N)->getOrdering() != "
+    Code += "if (cast<AtomicSDNode>(N)->getMergedOrdering() != "
             "AtomicOrdering::Monotonic) return false;\n";
   if (isAtomic() && isAtomicOrderingAcquire())
-    Code += "if (cast<AtomicSDNode>(N)->getOrdering() != "
+    Code += "if (cast<AtomicSDNode>(N)->getMergedOrdering() != "
             "AtomicOrdering::Acquire) return false;\n";
   if (isAtomic() && isAtomicOrderingRelease())
-    Code += "if (cast<AtomicSDNode>(N)->getOrdering() != "
+    Code += "if (cast<AtomicSDNode>(N)->getMergedOrdering() != "
             "AtomicOrdering::Release) return false;\n";
   if (isAtomic() && isAtomicOrderingAcquireRelease())
-    Code += "if (cast<AtomicSDNode>(N)->getOrdering() != "
+    Code += "if (cast<AtomicSDNode>(N)->getMergedOrdering() != "
             "AtomicOrdering::AcquireRelease) return false;\n";
   if (isAtomic() && isAtomicOrderingSequentiallyConsistent())
-    Code += "if (cast<AtomicSDNode>(N)->getOrdering() != "
+    Code += "if (cast<AtomicSDNode>(N)->getMergedOrdering() != "
             "AtomicOrdering::SequentiallyConsistent) return false;\n";
 
   if (isAtomic() && isAtomicOrderingAcquireOrStronger())
-    Code += "if (!isAcquireOrStronger(cast<AtomicSDNode>(N)->getOrdering())) "
+    Code += "if (!isAcquireOrStronger(cast<AtomicSDNode>(N)->getMergedOrdering())) "
             "return false;\n";
   if (isAtomic() && isAtomicOrderingWeakerThanAcquire())
-    Code += "if (isAcquireOrStronger(cast<AtomicSDNode>(N)->getOrdering())) "
+    Code += "if (isAcquireOrStronger(cast<AtomicSDNode>(N)->getMergedOrdering())) "
             "return false;\n";
 
   if (isAtomic() && isAtomicOrderingReleaseOrStronger())
-    Code += "if (!isReleaseOrStronger(cast<AtomicSDNode>(N)->getOrdering())) "
+    Code += "if (!isReleaseOrStronger(cast<AtomicSDNode>(N)->getMergedOrdering())) "
             "return false;\n";
   if (isAtomic() && isAtomicOrderingWeakerThanRelease())
-    Code += "if (isReleaseOrStronger(cast<AtomicSDNode>(N)->getOrdering())) "
+    Code += "if (isReleaseOrStronger(cast<AtomicSDNode>(N)->getMergedOrdering())) "
             "return false;\n";
 
   if (isLoad() || isStore()) {


        


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