[llvm] 49b2f83 - [x86] add test for extend of legal vector compare; NFC
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Fri May 28 04:50:44 PDT 2021
Author: Sanjay Patel
Date: 2021-05-28T07:50:27-04:00
New Revision: 49b2f8328f363b8c989f8139c2ab2063f26363ea
URL: https://github.com/llvm/llvm-project/commit/49b2f8328f363b8c989f8139c2ab2063f26363ea
DIFF: https://github.com/llvm/llvm-project/commit/49b2f8328f363b8c989f8139c2ab2063f26363ea.diff
LOG: [x86] add test for extend of legal vector compare; NFC
Additional test coverage for D103280.
Added:
Modified:
llvm/test/CodeGen/X86/sext-vsetcc.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/sext-vsetcc.ll b/llvm/test/CodeGen/X86/sext-vsetcc.ll
index 047259a79833..540ce1c5036a 100644
--- a/llvm/test/CodeGen/X86/sext-vsetcc.ll
+++ b/llvm/test/CodeGen/X86/sext-vsetcc.ll
@@ -427,6 +427,42 @@ define <8 x i16> @cmp_sgt_zextload(<8 x i8>* %x, <8 x i8>* %y) nounwind {
ret <8 x i16> %sext
}
+define <8 x i32> @cmp_ne_zextload_from_legal_op(<8 x i16>* %x, <8 x i16>* %y) {
+; SSE-LABEL: cmp_ne_zextload_from_legal_op:
+; SSE: # %bb.0:
+; SSE-NEXT: movdqa (%rdi), %xmm0
+; SSE-NEXT: pcmpeqw (%rsi), %xmm0
+; SSE-NEXT: pcmpeqd %xmm1, %xmm1
+; SSE-NEXT: pxor %xmm0, %xmm1
+; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
+; SSE-NEXT: psrad $16, %xmm0
+; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
+; SSE-NEXT: psrad $16, %xmm1
+; SSE-NEXT: retq
+;
+; AVX2-LABEL: cmp_ne_zextload_from_legal_op:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vmovdqa (%rdi), %xmm0
+; AVX2-NEXT: vpcmpeqw (%rsi), %xmm0, %xmm0
+; AVX2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
+; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: cmp_ne_zextload_from_legal_op:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vmovdqa (%rdi), %xmm0
+; AVX512-NEXT: vpcmpeqw (%rsi), %xmm0, %xmm0
+; AVX512-NEXT: vpternlogq $15, %zmm0, %zmm0, %zmm0
+; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0
+; AVX512-NEXT: retq
+ %loadx = load <8 x i16>, <8 x i16>* %x
+ %loady = load <8 x i16>, <8 x i16>* %y
+ %icmp = icmp ne <8 x i16> %loadx, %loady
+ %sext = sext <8 x i1> %icmp to <8 x i32>
+ ret <8 x i32> %sext
+}
+
define <8 x i32> @PR50055(<8 x i8>* %src, <8 x i32>* %dst) nounwind {
; SSE-LABEL: PR50055:
; SSE: # %bb.0:
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