[PATCH] D100577: [RISCV] Optimize getVLENFactoredAmount function.
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 28 01:00:27 PDT 2021
frasercrmck added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:1394
+ .addReg(VL)
+ .addReg(ShiftAmount);
+ BuildMI(MBB, II, DL, TII->get(RISCV::SUB), VL)
----------------
rogfer01 wrote:
> I saw a test failing downstream due to this. This should be `addImm(ShiftAmount)`
@craig.topper has fixed it in https://github.com/llvm/llvm-project/commit/020df692d801c4fa9a67eb32e923927e33f9e4b5
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D100577/new/
https://reviews.llvm.org/D100577
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