[PATCH] D103277: [RISCV] Teach VSETVLI insertion to look through PHIs to prove we don't need to insert a vsetvli.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 27 15:36:26 PDT 2021


This revision was automatically updated to reflect the committed changes.
Closed by commit rG0fa5aac292b8: [RISCV] Teach VSETVLI insertion to look through PHIs to prove we don't need to… (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103277/new/

https://reviews.llvm.org/D103277

Files:
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D103277.348405.patch
Type: text/x-patch
Size: 5462 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210527/a5708d25/attachment.bin>


More information about the llvm-commits mailing list