[PATCH] D100577: [RISCV] Optimize getVLENFactoredAmount function.

[Roger Ferrer Ibanez via Phabricator via llvm-commits]

rogfer01 added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:1394
+        .addReg(VL)
+        .addReg(ShiftAmount);
+    BuildMI(MBB, II, DL, TII->get(RISCV::SUB), VL)
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I saw a test failing downstream due to this. This should be `addImm(ShiftAmount)` 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100577/new/

https://reviews.llvm.org/D100577