[PATCH] D103277: [RISCV] Teach VSETVLI insertion to look through PHIs to prove we don't need to insert a vsetvli.

[Craig Topper via Phabricator via llvm-commits]

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If an instruction's AVL operand is a PHI node in the same block,
we may be able to peek through the PHI to find vsetvli instructions
that produce the AVL in other basic blocks. If we can prove those
vsetvli instructions have the same VTYPE and were the last vsetvli
in their respective blocks, then we don't need to insert a vsetvli
for this pseudo instruction.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D103277

Files:
  llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
  llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll

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