[PATCH] D103274: [X86] AMD Zen 3 has fast per-lane variable shuffles
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 27 11:31:37 PDT 2021
lebedev.ri added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:1
//===-- X86ISelLowering.cpp - X86 DAG Lowering Implementation -------------===//
//
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*Please* double-check that i correctly deduced where we meant per-lane vs. cross-lane shuffles.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D103274/new/
https://reviews.llvm.org/D103274
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