[PATCH] D103256: [AArch64] Remove SETCC of CSEL when the latter's condition can be inverted

Bradley Smith via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 27 08:02:20 PDT 2021


bsmith created this revision.
bsmith added reviewers: paulwalker-arm, peterwaller-arm, joechrisellis, david-arm.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
bsmith requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

  setcc (csel 0, 1, cond, X), 1, ne ==> csel 0, 1, !cond, X

Where X is a condition code setting instruction.

Co-authored-by: Paul Walker <paul.walker at arm.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D103256

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-setcc.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D103256.348273.patch
Type: text/x-patch
Size: 4665 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210527/54c3053a/attachment.bin>


More information about the llvm-commits mailing list