[llvm] 808dc6f - VirtRegMap: Preserve LiveDebugVariables

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2021-05-27T10:40:14-04:00
New Revision: 808dc6f8663c4c0696fc6eaf998db61a06330266

URL: https://github.com/llvm/llvm-project/commit/808dc6f8663c4c0696fc6eaf998db61a06330266
DIFF: https://github.com/llvm/llvm-project/commit/808dc6f8663c4c0696fc6eaf998db61a06330266.diff

LOG: VirtRegMap: Preserve LiveDebugVariables

This avoids recomputing it between regalloc runs when allocation is
split, and also avoids a debug info test regression.

Added: 
    

Modified: 
    llvm/lib/CodeGen/VirtRegMap.cpp
    llvm/test/CodeGen/AMDGPU/debug-value.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index 607f18c8ab7e..9b920e93d81a 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -181,6 +181,7 @@ class VirtRegRewriter : public MachineFunctionPass {
   SlotIndexes *Indexes;
   LiveIntervals *LIS;
   VirtRegMap *VRM;
+  LiveDebugVariables *DebugVars;
   DenseSet<Register> RewriteRegs;
   bool ClearVirtRegs;
 
@@ -238,6 +239,10 @@ void VirtRegRewriter::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.addRequired<LiveStacks>();
   AU.addPreserved<LiveStacks>();
   AU.addRequired<VirtRegMap>();
+
+  if (!ClearVirtRegs)
+    AU.addPreserved<LiveDebugVariables>();
+
   MachineFunctionPass::getAnalysisUsage(AU);
 }
 
@@ -249,6 +254,7 @@ bool VirtRegRewriter::runOnMachineFunction(MachineFunction &fn) {
   Indexes = &getAnalysis<SlotIndexes>();
   LIS = &getAnalysis<LiveIntervals>();
   VRM = &getAnalysis<VirtRegMap>();
+  DebugVars = getAnalysisIfAvailable<LiveDebugVariables>();
   LLVM_DEBUG(dbgs() << "********** REWRITE VIRTUAL REGISTERS **********\n"
                     << "********** Function: " << MF->getName() << '\n');
   LLVM_DEBUG(VRM->dump());
@@ -262,10 +268,13 @@ bool VirtRegRewriter::runOnMachineFunction(MachineFunction &fn) {
   // Rewrite virtual registers.
   rewrite();
 
-  // Write out new DBG_VALUE instructions.
-  getAnalysis<LiveDebugVariables>().emitDebugValues(VRM);
+  if (DebugVars && ClearVirtRegs) {
+    // Write out new DBG_VALUE instructions.
+
+    // We only do this if ClearVirtRegs is specified since this should be the
+    // final run of the pass and we don't want to emit them multiple times.
+    DebugVars->emitDebugValues(VRM);
 
-  if (ClearVirtRegs) {
     // All machine operands and other references to virtual registers have been
     // replaced. Remove the virtual registers and release all the transient data.
     VRM->clearAllVirt();

diff  --git a/llvm/test/CodeGen/AMDGPU/debug-value.ll b/llvm/test/CodeGen/AMDGPU/debug-value.ll
index 0eff1df7621b..b9a1b1b60bf4 100644
--- a/llvm/test/CodeGen/AMDGPU/debug-value.ll
+++ b/llvm/test/CodeGen/AMDGPU/debug-value.ll
@@ -71,7 +71,10 @@ bb28:                                             ; preds = %bb25, %bb21
   %tmp56 = fmul float %tmp55, %tmp50
   %tmp57 = fmul float %tmp54, %tmp56
   %tmp58 = fdiv float %tmp57, 0.000000e+00
+  ; Make sure this isn't double emitted
+  ; CHECK-NOT: ;DEBUG_VALUE:
   ; CHECK: ;DEBUG_VALUE: foo:var <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef]
+  ; CHECK-NOT: ;DEBUG_VALUE:
   call void @llvm.dbg.value(metadata <4 x float> %tmp29, metadata !3, metadata !DIExpression(DW_OP_constu, 1, DW_OP_swap, DW_OP_xderef)) #2, !dbg !5
   %tmp59 = bitcast i64 %tmp35 to <2 x float>
   %tmp60 = insertelement <2 x float> undef, float %tmp58, i32 0