[PATCH] D97982: [MC] Introduce NeverAlign fragment type
    Amir Ayupov via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Wed May 26 13:30:12 PDT 2021
    
    
  
Amir marked 4 inline comments as done.
Amir added inline comments.
================
Comment at: llvm/include/llvm/MC/MCFragment.h:37
     FT_Align,
+    FT_NeverAlign,
     FT_Data,
----------------
MaskRay wrote:
> Perhaps the name should include `X86`? Inserting a one-byte nop isn't something any RISC arch can do.
NeverAlign fragment emits a minimum-size nop, so the usage is not limited to X86 and can potentially be extended to architectures with fixed-length instructions. Modern ARM and RISC-V cores also have macro-fusion and may also face similar cache line crossing restrictions. 
================
Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:4733
+/// parseDirectiveAvoidEndAlign
+///  ::= .avoid_end_align alignment
+bool X86AsmParser::parseDirectiveAvoidEndAlign(SMLoc L) {
----------------
MaskRay wrote:
> Are you using the assembly syntax `.avoid_end_align` in tools? Or is it for testing purpose only?
It's only for testing purposes.
Repository:
  rG LLVM Github Monorepo
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  https://reviews.llvm.org/D97982/new/
https://reviews.llvm.org/D97982
    
    
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