[PATCH] D103174: RISCV: honour `.option relax` in assembly

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 26 09:00:26 PDT 2021


jrtc27 requested changes to this revision.
jrtc27 added a comment.
This revision now requires changes to proceed.

Shouldn't this be covered by option-relax.s already though? Is that test wrong? Is it specifically because of the `.option push`? If so, just shove a `.option push`/`.option pop` pair around the whole file. This also feels like the wrong place to fix this; we already handle it for instructions in `RISCVAsmParser::ParseInstruction`, and that was a deliberate choice to make it lazy. In fact, I don't think there is a bug at all? If there are no instructions emitted subject to relaxation, the bit isn't set, because it's unnecessary, and if there are instructions emitted subject to relaxation, we set the bit. Am I missing something?



================
Comment at: llvm/test/MC/RISCV/scoped-relaxation.s:1
+// RUN: llvm-mc -mattr -relax -triple riscv64-unknown-none-elf -filetype obj %s -o - | llvm-readobj -d -r - | FileCheck %s
+
----------------
Fix style to match other tests and remove redundant options. `#` is the canonical comment prefix for RISC-V, not `//`.


================
Comment at: llvm/test/MC/RISCV/scoped-relaxation.s:3
+
+       .global function
+
----------------
Don't indent any of these, it just makes the test look ugly.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D103174/new/

https://reviews.llvm.org/D103174



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